• Journal of the Korean Society for Heat Treatment
• /
• v.17 no.2
• /
• pp.78-86
• /
• 2004

Effects of the annealing parameters on the formation of ferrites transformed at low temperatures were studied in cold-rolled ultra low carbon steels with niobium and/or chromium. Niobium and chromium were found to be effective in the formation of the low temperature transformation ferrites. The low temperature transformation ferrites more easily formed when both higher annealing temperature and longer annealing time, allowing substitutional alloying elements to distribute between phases, are in combination with faster cooling rate. It was found from EBSD study that the additions of niobium or chromium resulted in the increase in the numbers of high angle grain boundaries and the decrease in those of the low angle grain boundaries in the microstructures. Both granular bainitic ferrite and bainitic ferrite were characterized by the not clearly etched grain boundaries in light microscopy because of the low angle grain boundaries.

• Korean Journal of Materials Research
• /
• v.22 no.8
• /
• pp.403-408
• /
• 2012

A sample of ultra low carbon IF steel was processed by six-layer stack accumulative roll-bonding (ARB) and annealed. The ARB was conducted at ambient temperature after deforming the as-received material to a thickness of 0.5 mm by 50% cold rolling. The ARB was performed for a six-layer stacked, i.e. a 3 mm thick sheet, up to 3 cycles (an equivalent strain of ~7.0). In each ARB cycle, the stacked sheets were, first, deformed to 1.5 mm thickness by 50% rolling and then reduced to 0.5 mm thickness, as the starting thickness, by multi-pass rolling without lubrication. The specimen after 3 cycles was then annealed for 0.5 h at various temperatures ranging from 673 to 973 K. The microstructural evolution with the annealing temperature for the 3-cycle ARB processed IF steel was investigated in detail by transmission electron microscopy observation. The ARB processed IF steel exhibited mainly a dislocation cell lamella structure with relatively high dislocation density in which the subgrains were partially observed. The selected area diffraction (SAD) patterns suggested that the misorientation between neighboring cells or subgrains was very small. The thickness of the grains increased in a gradual way up to 873 K, but above 898 K it increased drastically. As a result, the grains came to have an equiaxed morphology at 898 K, in which the width and the thickness of the grains were almost identical. The grain growth occurred actively at temperatures above 923 K.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.11 no.1
• /
• pp.23-28
• /
• 2016

In this paper, a Multi-Band Ku-band down converter was designed for reception of multi-band digital satellite broadcasting. The Multi-band low-nose down converter was designed to form four local oscillator frequencies (9.75, 10, 10.75 and 11.3GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select an one band of intermediate frequency (IF) channels by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64dB, and the noise figure of low-noise amplifier was 0.7dB, the P1dB of output signal 15dBm, and the phase noise -73dBc@100Hz at the band 1 carrier frequency of 9.75GHz. The low noise block downconverter (LNB) for receiving four-band digital satellite broadcasting designed in this paper can be used for satellite broadcasting of vessels navigating international waters.

• Journal of Advanced Navigation Technology
• /
• v.12 no.6
• /
• pp.604-610
• /
• 2008

A 2.4 GHz CMOS RF front-end using for ZigBee application is described The front-end consists of a low noise amplifier and a down-mixer and uses a 2 MHz IF frequency. A common source with resistive feedback and an inductive degeneration are adopted for a low noise amplifier, and a 20 dB gain control step is digitally controlled. A passive mixer for low current consumption is employed. The RF front-end is implemented in 0.18 ${\mu}m$IP6M CMOS process. The measured performance is 4.44 dB NF and -6.5 dBm IIP3 while consuming 3.28 mA current from a 1.8 V supply.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.3
• /
• pp.555-562
• /
• 2008

In this paper we proposed a practical low-power design technique using clock-gating in RTL. An efficient low-power methodology is that a high-level designer analyzes a generic system and designs a controller for clock-gating. Also the desirable flow is to derive clock-gating in normal synthesis process by synthesis tool than to insert directly gate to clock line. If low-power is considered in coding process, clock is gated in coding process. If not considered, after analyzing entire operation. clock is Bated in periods of holding data. After analyzing operation for clock-gating, a controller was designed for it, and then a low-power circuit was generated by synthesis tool. From result, we identified that the consumed power of register decreased from 922mW to 543mW, that is the decrease rate is 42%. In case of synthesizing the test circuit using synthesizer of Power Theater, it decreased from 322mW to 208mW (36.5% decrease).

• Proceedings of the IEEK Conference
• /
• 2000.11b
• /
• pp.104-107
• /
• 2000

We designed and implemented the RFIC(RF front-end IC) for DTV(Digital TV) tuner. The DTV tuner RF front-end consists of low noise IF amplifier fur the amplification of 900 MHz RF signal and down conversion mixer for the RF signal to 44MHz IF conversion. The RFIC is implemented on ETRI 0.8u high resistive (2㎘ -cm) and evaluated by on wafer, packaged chip test. The gain and IIP3 of IF amplifier are 15㏈ and -6.6㏈m respectively. For the down conversion mixer gain and IIP3 are 13㏈ and -6.5㏈m. Operating voltage of the IF amplifier and the down mixer is 5V, current consumption are 13㎃ and 26㎃ respectively.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.4B
• /
• pp.624-628
• /
• 2000

In this paper, the phenomenon to show in CDMA handset in case of which CDMA handset do not meet Traffic Rho value of IS-98B specifications, which have minimum requirements of CDMA handset about electrical performance is analyzed. This paper proposed method to improve Traffic Rho through improving the matching circuit of TX IF SAW FILTER and deleting noise of LDO(Low Dropout Regulator) to generate 3.OV_TX in TX block. HP8924C(CDMA Mobile Station Tester Set) and HP8595E(Spectrum Analyzer) measures the improved CDMA waveform.

• Nutritional Sciences
• /
• v.6 no.1
• /
• pp.48-52
• /
• 2003

The Dietary Reference Intakes (DRI's) are new nutrient intake standards that are being set for the United States and Canada. There are currently four types of DRI's: Estimated Average Requirements (EAR), Recommended Dietary Allowances (RDA), Adequate Intakes (AI), and Tolerable Upper Intake Levels (UL). The EAR is the nutrient intake that would be adequate for about half the population, while intake at the RDA should be adequate for 97-98% of the population. When the data are insufficient to set an EAR and RDA, then an AI is set. The UL is the highest intake level that does not pose a risk of adverse effects. The EAR, AI, and UL may be used to assess intakes of both individuals and of groups of people. For individuals, the EAR is used to calculate the probability that intake is inadequate, the AI is used to decide if the probability of inadequacy is low, and the UL is used to determine if a risk of excess intake is present. For groups. the EAR is used to estimate the prevalence of inadequacy, the AI is used to decide if the prevalence of inadequacy is low, and the UL is used to estimate the prevalence of excessive intakes. Because this approach to setting and applying nutrient standards is new, research recommendations include improving estimates of risk, improving dietary data, and improving statistical methods.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.28 no.9
• /
• pp.67-72
• /
• 2014

Inflow or outflow from the water treatment plant and the sewage water has potential energy. If this potential energy can be converted into electrical energy by water turbine generator, it can help to save energy because of the high capacity utilization. So recently, micro hydro power plant is reviewed in the water treatment facility. If generation capacity is low, induction generator is primarily used. If output capacity is low, generated power is supplied to the inside load. Induction generator can cause voltage drop by the inrush current at a start-up and requires reactive power for magnetization. In this study, we analyzed the flow of power and voltage variation against inrush current that occurs when the induction generator starts under the terms that loads of linear and non-linear of the water purification plant are used. Analysis results are that the voltage drop is within an allowable range and the power factor is slightly reduced by the need of reactive power.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.5
• /
• pp.595-604
• /
• 2016

Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.