• 제목/요약/키워드: Logic Program

검색결과 407건 처리시간 0.026초

한국형 2차선도로 모의실험 프로그램(TWOPAS)의 개발 (Development of Two-lane, Two-way Highway Simulation Program(TWOPAS) for Korean Condition)

  • 이진수;최병국;윤녀환;윤항묵
    • 대한교통학회지
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    • 제11권1호
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    • pp.23-36
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    • 1993
  • The two-lane, two-way highway simulation program(TWOPAS) is evaluated for Korean Highway Capacity Manual Study. TWOPAS program input variables, especially related vehicle performance, traffic flow relationship, car-following model and passing logic are examined and modified through the analysis results of our two-lane, two-way highway traffic characteristics. Simulation outputs with and without modification are compared with the field data. The results show that improved TWOPAS program(TWOPAS KI) is well suitable for simulating our two-lane, two-way highway condition.

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RTS법의 개요 및 프로그램 소개 (Introduction of RTS Method and Load Calculation Program)

  • 김강산;김용찬;오명도
    • 대한설비공학회:학술대회논문집
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    • 대한설비공학회 2008년도 하계학술발표대회 논문집
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    • pp.1067-1072
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    • 2008
  • This paper introduces the RTS method developed by the ASHRAE. In addition, a load calculation program was developed based on the RTS method and then the calculation logic and procedure are explained in detail. The developed program was designed to allow easy and precise predictions of the building load.

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RTS 법의 개요 및 프로그램 소개 (Introduction of RTS Method and Load Calculation Program)

  • 김강산;김용찬;오명도
    • 대한설비공학회:학술대회논문집
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    • 대한설비공학회 2006년도 하계학술발표대회 논문집
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    • pp.519-524
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    • 2006
  • This paper introduces the RTS method developed by the ASHRAE. In addition, a load calculation program was developed based on the RTS method and then the calculation logic and procedure are explained in detail. The developed program was designed to allow easy and precise predictions of the building load.

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국가연구개발사업의 사전 분석틀 표준화 연구: 연구개발 부문 예비타당성조사 표준지침을 중심으로 (Study on Standard Framework for Analyzing Government R&D Program: the case of Preliminary Feasibility Study on R&D Program)

  • 안상진;김혜원;이윤빈
    • 기술혁신학회지
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    • 제16권1호
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    • pp.176-198
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    • 2013
  • 예비타당성조사는 대규모 신규 공공투자사업에 대한 신중한 접근을 진작하고자 1999년에 도입되었다. 사업 타당성에 대한 결론 도출 시 비용편익분석으로 대변되는 경제적 타당성 분석을 중요시하므로, R&D사업의 분석과 결론 도출에 있어서 다양한 쟁점이 제기되어 왔다. 본 연구에서는 연구개발부문 예비타당성조사에서 표준화하여 적용할 수 있는 사항을 살펴보았으며, 대표질문과 평가항목 간의 상관관계를 통하여 쟁점 도출을 표준화하는 방안을 제시하였다. 그리고 R&D효과 분류와 논리분석의 적용을 통해 분석전략을 표준화하여 R&D투자 의사결정의 합리화에 기여하고자 한다.

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SFC 그래픽 언어로 기술된 공정제어 시스템에서 효율적인 에러관리 방법 (Efficient Error Management Method in Process Control System Described by SFC Graphical Language)

  • 전호익;우광준
    • 조명전기설비학회논문지
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    • 제14권1호
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    • pp.59-66
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    • 2000
  • 최근 산업공정 시스댐이 복잡해지고 고도의 성능을 요구함에 따라 PLC의 하드혜어와 소프트웨어의 성능이 향상되었다. SFC 그래픽 언어는 순차 논리 알고리즘을 기술뿐만 아니라 인터록 제어 알고리즘과 같은 에러 관리 알고리즘을 기술하는 데에도 적합하다. 본 논문에서는 산업 공정 제어 시스템을 기술하는데 있어서 효과적으로 에러를 관리하기 위해 제한자를 이용 한 에러 관리 방법올 제안하였으며, 제안된 방법으로 필름 코탱기 제어 시스템을 구현한 결과 에러 관리가 용이하고 프로그랩 메모리의 용량을 줄일 수 있었음을 확인하였다.

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제어 시스템 설계를 위한 IEC 1131-3 기반의 제어 로직 생성기의 개발 (Development of a IEC 1131-3-Based Control Logic Generator for the Control System Design)

  • 정구;심주현;이제필;이철수
    • 한국공작기계학회:학술대회논문집
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    • 한국공작기계학회 2001년도 춘계학술대회 논문집(한국공작기계학회)
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    • pp.171-176
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    • 2001
  • This paper describes the methodology of an IEC 1131-3-based control logic generator for the control system design and converting algorithm between programmable languages. The proposed control logic generator is generated based on the software model and common element with data type, variables, POUs(program organization unit) and execution control unit commonly used within programmable languages of IEC 1131-3 Standard. The generation method of object file was proposed on five programmable language based on IECI 131-3. The generation method of object file is represented as following; 1) the generation method using conversion algorithm from LD to IL with FBD(function block diagram), 2) the generation method using C code generation algorithm from SFC using the SFC execution sequence with FBD and ST(structured text). The proposed control logic generator was implemented by Visual C++ and MFC on MS-windows NT 4.0

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PLC용 RISC 프로세서의 구조와 명령어에 관한 연구 (A study on the architecture and instruction of a RISC processor for programmable logic controller)

  • 구경훈;박재현;장래혁;권욱현
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
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    • pp.1012-1017
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    • 1993
  • In this paper, the instruction set and the architecture of a RISC processor for programmable logic controller is suggested. From the measurement of existing programs, the characteristics of ladder instructions are analyzed. The instruction set is defined so that the existing ladder program can be reused with simple translation. Because bit instructions controls the behavior of word instructions, the processor suits for high level language like SFC. Simulations show that the PLC with the suggested processor is twenty times faster than the PLC with the multi-purpose microprocessor.

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컴퓨터를 이용한 순차 논리 회로의 설계(비동기 순차논리 회로의 경우 (Computer-Aided Design of Sequential Logic Circuits (Case of Asynchronous Sequential Logic Circuits))

  • 김병철;조동섭;황희영
    • 대한전기학회논문지
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    • 제33권2호
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    • pp.47-55
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    • 1984
  • This paper is concerned with a computer-aided state assignment, that is, coding race-free internal states of asynchronous sequential circuits, and a method for minimizing the combinational network of asynchronous sequential circuits. The FORTRAN version of the peoposed algorithm results in race-free state assignments and reduction of the number of connections and gates with near minimal hardware cost. Some examples are designed by the proposed computer program to illustrate the algorithm in this paper. Finally, results are compared with those of the other methods.

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Connecting Program Evaluation Strategies with the Program Life Cycle: Implications for Family Development Programs

  • Son, Seo-Hee;Marczak, Mary S.
    • International Journal of Human Ecology
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    • 제11권1호
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    • pp.65-74
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    • 2010
  • Family professionals and family program staff need to consider the importance of program evaluation in Korea since an increasing number of Healthy Family Support Centers are providing diverse intervention and education programs. The purpose of this research paper is to (a) introduce a program evaluation model that includes the program life cycle; (b) help family professionals and family program staff understand the link between program implementation and evaluation processes; and (c) facilitate discussions in terms of program evaluation of Healthy Family Support Centers and evaluation roles of different levels of Healthy Family Support Centers including the headquarters, regional, and local centers. Understanding the program life cycle and relevant evaluation processes will help family professionals and family program staff be more strategic in answering critical questions about a program's effectiveness. The benefits of program evaluation and its implications are discussed.

공간통사론의 수학모델과 분석도구의 개발에 관한 연구 (A Study on Space Syntax Mathematical Model and Software Development for Analyzing)

  • 이종렬
    • 한국디지털건축인테리어학회논문집
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    • 제6권2호
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    • pp.1-8
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    • 2006
  • This study is investigates space syntax theory, developed by Bill Hiller, used for physical analysis and visual access of space and role of spatial configuration based on social logic. it mean computer program analyze physical structure of space and represent by mathematical logic. it used for predict space use and Descriptive of spatial configuration. This method and theory is incompletion for design, but it enough useful tool for architecture and urban design and will be improved. And development of a simple computer program - SSA(Sspace Syntax Analysis) for space syntax analysis and study. SSA is based on convex map analysis and using VISIO software for easily using and development.

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