• Proceedings of the KIPE Conference
• /
• 2017.07a
• /
• pp.268-269
• /
• 2017

This paper presents an improved current control strategy for a three-phase grid-connected inverter under distorted grid conditions. Distorted grid condition is undesirable due to negative effects such as power losses and heating problem in electrical equipments. To enhance the power quality of distributed generation systems under such a condition, a modulated finite control set - model predictive control (MFCS-MPC) scheme will be proposed, in which the optimal switching signals of inverter are chosen by online basis using the principle of current error minimization. In addition, the moving average filter (MAF) is used to improve the phase-lock loop in order to obtain the harmonic-free reference currents on the stationary frame. The usefulness of the proposed MFCS-MPC method is proved by the comparative simulation results under different operating conditions.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.2
• /
• pp.122-133
• /
• 2013

An arbiter-based simple phase decision circuit (PDC) optimized for high-resolution phase-to-digital converter made up of an analog phase-frequency detector and a time-to-digital converter for all-digital phase-locked loops is proposed. It can distinguish very small phase difference between two pulses even though it consumes lower power and has smaller input-to-output delay than the previously reported PDC. Proposed PDC is realized using 130-nm CMOS process and demonstrated by transistor-level simulations. A 5-bit P2D having no offset nor deadzone using the PDC is also demonstrated. A harmonic-lock-free and small-phase-offset delay-locked loop for fixing the P2D resolution regardless of PVT variations is also proposed and demonstrated.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2004.08a
• /
• pp.673-675
• /
• 2004

This study proposes controller with voltage-compensated drivers for producing gray-scaled pictures on passive matrix organic light emitting diodes (PMOLEDs) panels. The controller includes voltage type drivers so the output impedance of the driver is far less than that of the current-type driver. Its low output impedance provides better electron-optical properties than those of traditional current drivers. A free running clock and a group of counters are applied to the gray-scaled function so that phase lock loop (PLL) circuit can be reduced in the controller. A pre-charge function is used to enhance performance of the luminance of an active OLED pixel. As a result, distribution of the low gray level portion is achieved linear relationship with input data. In this work, the digital part of the proposed controller is implemented using FPGA chips, and analog parts are combined with a digital-analog converter (DAC) and analog switches. A still image is displayed on a $48^{\ast}64$ PMOLEDs panel to assess the luminance performance fir the controller. Based on its cost requirement and luminance performance, the controller is qualified to join the market for driving PMOLEDs panels.

• Journal of the Korean Society for Nondestructive Testing
• /
• v.37 no.2
• /
• pp.106-114
• /
• 2017

This paper presents an automated subsurface micro void detection technique based on pulsed infrared thermography for inspecting epoxy molding compounds (EMC) used in electronic device packaging. Subsurface micro voids are first detected and visualized by extracting a lock-in amplitude image from raw thermal images. Binary imaging follows to achieve better visualization of subsurface micro voids. A median filter is then applied for removing sparse noise components. The performance of the proposed technique is tested using 36 EMC samples, which have subsurface (below $150{\mu}m{\sim}300{\mu}m$ from the inspection surface) micro voids ($150{\mu}m{\sim}300{\mu}m$ in diameter). The experimental results show that the subsurface micro voids can be successfully detected without causing any damage to the EMC samples, making it suitable for automated online inspection.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2001.04a
• /
• pp.523-526
• /
• 2001

3GPP2 방식에서는 Macro Mobility 지원을 위하여 MIP를 이용하며 PDSN은 FA의 기능을 수행한다. 이때 하나의 PDSN에서 다른 PDSN으로 MS가 이동할 경우 지원되는 이동성을 Macro Mobility라 하며, POSN 관리 영역 내의 하나의 RN에서 다른 RN으로 이동시에 지원되는 이동성을 Micro Mobility라 한다. 본 논문은 Micro Mobility를 지원하기 위한 멀티캐스트 그룹 메커니즘 기반의 Seamless 핸드오프 알고리즘을 제안하고 있다. 제안된 알고리즘은 MS의 이동방향과 속도를 계산하여, 예상 이동경로에 인접한 RN들을 멀티캐스트 그룹으로 구성하고, 그룹 조인 시점을 최대한 늦춤으로서 망의 효율성을 높인다. 또한, 기존의 멀티캐스트 연결 방법이 가지고 있는 버퍼 오버헤드에 대한 문제점을 해결하기 위해, PDSN은 예상 핸드오프 시간 이후의 데이터만을 전송하며, RN 또한 예상 핸드오프 시간 이후의 데이터만을 버퍼링 한다. 제안된 알고리즘의 Dead Lock Free, Liveness 및 Reliability를 검증하기 위해 State Transition Diagram을 작성하고, 페트리 네트를 이용하였다.

• The Journal of Korea Robotics Society
• /
• v.14 no.4
• /
• pp.318-325
• /
• 2019

NREX, an upper limb exoskeleton robot, was developed at the National Rehabilitation Center to assist in the upper limb movements of subjects with weak muscular strength and control ability of the upper limbs, such as those with hemiplegia. For the free movement of the shoulder of the existing NREX, three passive joints were added, which improved its wearability. For the flexion/extension movement and internal/external rotation movement of the shoulder of the robot, the ball lock pin is used to fix or rotate the passive joint. The force and torque between a human and a robot were measured and analyzed in a reaching movement for four targets using a six-axis force/torque sensor for 20 able-bodied subjects. The addition of two passive joints to allow the user to rotate the shoulder can confirm that the average force of the upper limb must be 31.6% less and the torque must be 48.9% less to perform the movement related to the axis of rotation.

• Structural Engineering and Mechanics
• /
• v.29 no.3
• /
• pp.289-300
• /
• 2008

The use of metric trial functions to represent the real stress field in what is called the unsymmetric finite element formulation is an effective way to improve predictions from distorted finite elements. This approach works surprisingly well because the use of parametric functions for the test functions satisfies the continuity conditions while the use of metric (Cartesian) shape functions for the trial functions attempts to ensure that the stress representation during finite element computation can retrieve in a best-fit manner, the actual variation of stress in the metric space. However, the issue of how to handle situations where there is locking along with mesh distortion has never been addressed. In this paper, we show that the use of a consistent definition of the constrained strain field in the metric space can ensure a lock-free solution even when there is mesh distortion. The three-noded Timoshenko beam element is used to illustrate the principles. Some significant conclusions are drawn regarding the optimal strategy for finite element modelling where distortion effects and field-consistency requirements have to be reconciled simultaneously.

• Structural Engineering and Mechanics
• /
• v.69 no.6
• /
• pp.615-626
• /
• 2019

The 3-noded metric Timoshenko beam element with an offset of the internal node from the element centre is used here to demonstrate the best-fit paradigm using function space formulation under locking and mesh distortion. The best-fit paradigm follows from the projection theorem describing finite element analysis which shows that the stresses computed by the displacement finite element procedure are the best approximation of the true stresses at an element level as well as global level. In this paper, closed form best-fit solutions are arrived for the 3-noded Timoshenko beam element through function space formulation by combining field consistency requirements and distortion effects for the element modelled in metric Cartesian coordinates. It is demonstrated through projection theorems how lock-free best-fit solutions are arrived even under mesh distortion by using a consistent definition for the shear strain field. It is shown how the field consistency enforced finite element solution differ from the best-fit solution by an extraneous response resulting from an additional spurious force vector. However, it can be observed that when the extraneous forces vanish fortuitously, the field consistent solution coincides with the best-fit strain solution.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.48 no.5
• /
• pp.383-390
• /
• 2020

Wedge locks have been widely used for spaceborne electronics for mounting or removal of a printed circuit board (PCB) during integration, test and maintenance process. However, it can basically provide a mechanical constraint on the edge of the board. Thus, securing a fatigue life of solder joint for electronic package by limiting board deflection becomes difficult as the board size increases. Previously, additional stiffeners have been applied to reduce the board deflection, but the mass and volume increases of electronics are unavoidable. To overcome the aforementioned limitation, we proposed an application of multi-layered PCB sheet with viscoelastic adhesive tapes to implement high-damping capability on the board. Thus, it is more advantageous in securing the fatigue life of package under launch environment compared with the previous approach. The basic characteristics of the PCB with the multi-layered sheet was investigated through free-vibration tests at various temperatures. The effectiveness of the proposed design was validated through launch vibration test at qualification level and fatigue life prediction of electronic package based on the test results.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.12 no.4
• /
• pp.433-448
• /
• 2012

A source-synchronous receiver based on a delay-locked loop is presented. It employs a shared global calibration control between channels, yet achieves channel expandability for high aggregate I/O bandwidth. The global calibration control accomplishes skew calibration, equalizer adaptation, and phase lock of all the channels in a calibration period, resulting in the reduced hardware overhead and area of each data lane. In addition, the weight-adjusted dual-interpolating delay cell, which is used in the multiphase DLL, guarantees sufficient phase linearity without using dummy delay cells, while offering a high-frequency operation. The proposed receiver is designed in the 90-nm CMOS technology, and achieves error-free eye openings of more than 0.5 UI across 9-28 inch Nelco4000-6 microstrips at 4-7 Gb/s and more than 0.42 UI at data rates of up to 9 Gb/s. The data lane occupies only $0.152mm^2$ and consumes 69.8 mW, while the rest of the receiver occupies $0.297mm^2$ and consumes 56.0 mW at the 7- Gb/s data-rate and supply voltage of 1.35 V.