• Journal of the Semiconductor & Display Technology
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• v.21 no.4
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• pp.138-143
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• 2022

We analyzed the influence of post-annealing on Ga₂O₃/n-type 4H-SiC heterojunction diode. Gallium oxide (Ga₂O₃) thin films were deposited by radio frequency (RF) sputtering. Post-deposition annealing at 950℃ in an Oxygen atmosphere was performed. The material properties of Ga₂O₃ and the electrical properties of the diodes were investigated. Atomic Force Microscopy (AFM), X-Ray Diffraction and Scanning Electron Microscope (SEM) images show a significant increase in the roughness and crystallinity of the O₂-annealed films. After Oxygen annealing X-ray Photoelectron Spectroscopy (XPS) shows that the atomic ratio of oxygen increases which is related to a decrease in oxygen vacancy within the Ga₂O₃ film. The O₂-annealed diodes exhibited higher on-current and lower leakage current. Moreover, the ideality factor, barrier height, and thermal activation energy were derived from the current-voltage curve by increasing the temperature from 298 - 434K.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.172-173
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• 2006

Metal-ferroelectric-insulator-semiconductor (MFIS) structures with $Bi_{3.35}La_{0.75}Ti_3O_{12}$ (BLT) ferroelectric film and Zirconium oxide ($ZrO_2$) layer were fabricated on p-type Si(100). $ZrO_2$ and BLT films were prepared by sol-gel technique. Surface morphologies of $ZrO_2$ and BLT film were measured by atomic force microscope (AFM). The electrical characteristics of Au/$ZrO_2$/Si and Au/BLT/$ZrO_2$/Si film were investigated by C-V and I-V measurements. No hysteretic characteristics was observed in the C-V curve of the Au/$ZrO_2$/Si structure. The memory window width m C-V curve of the Au/BLT/$ZrO_2$/Si diode was about 1.3 V for a voltage sweep of ${\pm}5$ V. The leakage current of Au/$ZrO_2$/Si and Au/BLT/$ZrO_2$/Si structures were about $3{\times}10^{-8}$ A at 30 MV/cm and $3{\times}10^{-8}$ A at 3 MV/cm, respectively.

• Journal of the Korean Vacuum Society
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• v.11 no.4
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• pp.230-234
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• 2002

Metal-ferroelectric-semiconductor(MFS) capacitors by using rapid thermal annealed $LiNbO_3$/Si structures were successfully fabricated and demonstrated nonvolatile memory operations of the MFS capacitors. The C-V characteristics of MFS capacitors showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3$thin film. The dielectric constant of the $LiNbO_3$film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V) curve was about 25. The gate leakage current density of MFS capacitor using a platinum electrode showed the least value of $1{\times}10^{-8}\textrm{A/cm}^2$ order at the electric field of 500 kV/cm. The minimum interface trap density around midgap was estimated to be about $10^{11}/cm^2$.eV. The typical measured remnant polarization(2Pr) value was about 1.2 $\mu\textrm{C/cm}^2$, in an applied electric field of $\pm$ 300 kv/cm. The ferroelectric capacitors showed no polarization degradation up to about $10^{10}$ switching cycles when subjected to symmetric bipolar voltage pulse in the 500 kHz.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.54 no.10
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• pp.438-442
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• 2005

Si nanocrystal (Si NC) memory device has several advantages such as better retention, lower operating voltage, reduced punch-through and consequently a smaller cell area, suppressed leakage current. However, the physical and electrical reasons for this behavior are not completely understood but could be related to interface states of Si NCs. In order to find out this effect, we characterized electrical properties of Si NCs embedded in a SiO$_{2}$ layer by scanning probe microscopy (SPM). The Si NCs were generated by the laser ablation method with compressed Si powder and followed by a sharpening oxidation. In this step Si NCs are capped with a thin oxide layer with the thickness of 1$\~$2 nm for isolation and the size control. The size of 51 NCs is in the range of 10$\~$50 m and the density around 10$^{11}$/cm$^{2}$ It also affects the interface states of Si NCs, resulting in the change of electrical properties. Using a conducting tip, the charge was injected directly into each Si NC, and the image contrast change and dC/dV curve shift due to the trapped charges were monitored. The results were compared with C-V characteristics of the conventional MOS capacitor structure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.35-38
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• 2002

In this paper, the characteristics of channel hot electron (CHE) injection for the write operation in a NOR-type SONOS flash memory with common source line were investigated. The thicknesses of he tunnel oxide, the memory nitride， and the blocking oxide layers for the gate insulator of the fabricated SONOS devices were $34{\AA}$, $73{\AA}$, and $34{\AA}$, respectively. The SONOS devices compared to floating gate devices have many advantages, which are a simpler cell structure, compatibility with conventional logic CMOS process and a superior scalability. For these reasons, the introduction of SONOS device has stimulated. In the conventional SONOS devices, Modified Folwer-Nordheim (MFN) tunneling and CHE injection for writing require high voltages, which are typically in the range of 9 V to 15 V. However CHE injection in our devices was achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The memory window of about 3.2 V and the write speed of $100{\mu}s$ were obtained. Also, the disturbance and drain turn-on leakage during CHE injection were not affected in the SONOS array. These results show that CHE injection can be achieved with a low voltage and single power supply, and applied for the high speed program of the SONOS memory devices.

• Journal of Biomedical Engineering Research
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• v.28 no.2
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• pp.306-309
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• 2007

PXLM(Phosphor based x-ray light modulator) has a combined structure by phosphor, photoconductor, and liquid crystal and it can realize x-ray image of high resolution in clinical diagnosis area. In this study, we fabricated a photoconductor and investigated electrical and optical properties to confirm application possibility of radiator detector of PXLM structure. As photoconductor, amorphous selenium(a-Se), which is used most in DR(Digital radiography) of direct conversion method, was used and for formation of thin film, it was formed as $20{\mu}m-thick$ by using thermal vacuum evaporation system. For a produced a-Se film, through XRD(X-ray diffraction) and SEM(Scanning electron microscope), we investigated that amorphous structure was uniformly established and through optical measurement, for visible light of 40 $0\sim630nm$, it had absorption efficiency of 95 % and more. After fabricated a-Se film on the top of ITP substrate, hybrid structure was manufactured through forming $Gd_2O_3:Eu$ phosphor of $270{\mu}m-thick$ on the bottom of the substrate. As the result to confirm electrical property of the manufactured hybrid structure, in the case of appling $10V/{\mu}m$, leakage current of $2.5nA/cm^2$ and x-ray sensitivity of $7.31nC/cm^2/mR$ were investigated. Finally, we manufactured PXLM structure combined with hybrid structure and liquid crystal cell of TN(Twisted nematic) mode and then, investigated T-V(Transmission vs. voltage) curve of external light source for induced x-ray energy. PXLM structure showed a similar optical response with T-V curve that common TN mode liquid crystal cell showed according to electric field increase and in appling $50\sim100V$, it showed linear transmission efficiency of $12\sim18%$. This result suggested an application possibility of PXLM structure as radiation detector.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.53.2-53.2
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• 2010

지금까지 능동 구동 디스플레이의 TFT backplane에 사용하고 있는 채널 물질로는 수소화된 비정질 실리콘(a-Si:H)과 저온 폴리실리콘(low temperature poly-Si)이 대표적이다. 수소화된 비정질 실리콘은 TFT-LCD 제조에 주로 사용되는 물질로 제조 공정이 비교적 간단하고 안정적이며, 생산 비용이 낮고, 소자 간 특성이 균일하여 대면적 디스플레이 제조에 유리하다. 그러나 a-Si:H TFT의 이동도(mobility)가 1 cm2/Vs이하로 낮아 Full HD 이상의 대화면, 고해상도, 고속 동작을 요구하는 UD(ultra definition)급 디스플레이를 개발하는데 있어 한계 상황에 다다르고 있다. 또한 광 누설 전류(photo leakage current)의 발생을 억제하기 위해서 화소의 개구율(aperture ratio)을 감소시켜야하므로 패널의 투과율이 저하되고, 게이트 전극에 지속적으로 바이어스를 인가 시 TFT의 문턱전압(threshold voltage)이 열화되는 문제점을 가지고 있다. 문제점을 극복하기 위한 대안으로 근래 투명 산화물 반도체(transparent oxide semiconductor)가 많은 관심을 얻고 있다. 투명 산화물 반도체는 3 eV 이상의 높은 밴드갭(band-gap)을 가지고 있어 광 흡수도가 낮아 투명하고, 광 누설 전류의 영향이 작아 화소 설계시 유리하다. 최근 다양한 조성의 산화물 반도체들이 TFT 채널 층으로의 적용을 목적으로 활발하게 연구되고 있으며 ZnO, SnO2, In2O3, IGO(indium-gallium oxide), a-ZTO(amorphous zinc-tin-oxide), a-IZO (amorphous indium-zinc oxide), a-IGZO(amorphous indium-galliumzinc oxide) 등이 그 예이다. 이들은 상온 또는 $200^{\circ}C$ 이하의 낮은 온도에서 PLD(pulsed laser deposition)나 스퍼터링(sputtering)과 같은 물리적 기상 증착법(physical vapor deposition)으로 손쉽게 증착이 가능하다. 특히 이중에서도 a-IGZO는 비정질임에도 불구하고 이동도가 $10\;cm2/V{\cdot}s$ 정도로 a-Si:H에 비해 월등히 높은 이동도를 나타낸다. 이와 같이 a-IGZO는 비정질이 가지는 균일한 특성과 양호한 이동도로 인하여 대화면, 고속, 고화질의 평판 디스플레이용 TFT 제작에 적합하고, 뿐만 아니라 공정 온도가 낮은 장점으로 인해 플렉시블 디스플레이(flexible display)의 backplane 소재로서도 연구되고 있다. 본 실험에서는 rf sputtering을 이용하여 증착한 a-IGZO 박막에 대하여 열처리 조건 변화에 따른 a-IGZO 박막들의 광학적, 전기적 특성변화를 살펴보았고, 이와 더불어 a-IGZO 박막을 TFT에 적용하여 소자의 특성을 분석함으로써, 열처리에 따른 Transfer Curve에서의 우리가 요구하는 Threshold Voltage(Vth)의 변화를 관찰하였다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.16 no.4
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• pp.36-46
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• 1979

Using N_ Ch silicon gate technology . the capacitors and transistors with various dimenssion were fabricated. Although the applied process was somewhat standard the conditions of ion implantation for the gate were varied by changing the implant energies from 30keV to 60keV for B and from 100 keV to 175keV for P . The doses of the implant also changed from 3 $\times$ 10 /$\textrm{cm}^2$ to 5 $\times$ 10 /$\textrm{cm}^2$ for B and from 4$\times$ 10 /$\textrm{cm}^2$ to 7 $\times$ 10 /$\textrm{cm}^2$ for P . The D. C. parameters such as threshold voltage. substrate doping level, the degree of inversion, capacitance. flat band voltage, depletion layer width, gate oxide thickless, surface states, motile charge density, electron mobility. leakage current were evaluated and also compared with the corresponing theoretical values and / or good numbers for application. The threshold voltages measured using curve tracer and C-V plot gave good agreements with the values calculated from SUPREM II which has been developed by Stanford University process group. The threshold vol tapes with back gate bias were used to calculate the change of the substrate doping level. The measured subthreshold slope enabled the prediction of the degree of inversion The D. C. testing results suggest the realized capacitors and transistors are suited for the memory applications.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.3
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• pp.169-173
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• 2015

This study is to predict the life exponent by measuring, over 7 years, the insulation resistance of high-voltage cables in 22 kV operation for 13 years. We found out the lifetime index in order to determine the time-dependent trend of deteriorating performance of power cables. The insulation resistances decreased according to elapsed time. We found that: the initial measurements of the cable systems were in agreement with the deterioration properties of the Arrhenius Law. By analyzing the life curve of the cable system, we also verified that the value of the life exponent (n) in the v-t characteristics defined by Weibull distribution has values from 10 to 11. When designing the cable system, the initial value of life exponent was chosen as 9 without any grounding. We have verified that the theoretical grounding based on the design safety of n=9 was actually the best one available. In the short term, we apply our research result to the diagnosis and evaluation of the power cables. In the long run, however, we plan to reduce the cost of the installation and management of cable systems in operation at power stations.