• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.10
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• pp.1927-1934
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• 2016

In this paper, we proposed a I-gate n-MOSFET (n-type Metal Oxide Semiconductors Field Effect Transistor) structure in order to mitigate a radiation-induced leakage current path in an isolation oxide interface of a silicon-based standard n-MOSFET. The proposed I-gate n-MOSFET structure was designed by using a layout modification technology in the standard 0.18um CMOS (Complementary Metal Oxide Semiconductor) process, this structure supplements the structural drawbacks of conventional radiation-tolerant electronic device using layout modification technology such as an ELT (Enclosed Layout Transistor) and a DGA (Dummy Gate-Assisted) n-MOSFET. Thus, in comparison with the conventional structures, it can ensure expandability of a circuit design in a semiconductor-chip fabrication. Also for verification of a radiation-tolerant characteristic, we carried out M&S (Modeling and Simulation) using TCAD 3D (Technology Computer Aided Design 3-dimension) tool. As a results, we had confirmed the radiation-tolerant characteristic of the I-gate n-MOSFET structure.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.581-582
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• 2006

In this paper, we investigate three different types of multi-fingered layout nMOSFET devices with varying $W_f$(unit finger width) and $N_f$(number of finger). Using layout modification, we improve $f_T$(current gain cutoff frequency) value of 15GHz without scaling down, and moreover, we decrease $NF_{min}$(minimum noise figure) by 0.23dB at 5GHz. The RF noise can be reduced by increasing $f_T$, choosing proper finger width, and reducing the gate resistance. For the same total gate width using multi-fingered layout, the increase of finger width shows high $f_T$ due to the reduced parasitic capacitance. However, this does not result in low $NF_{min}$ since the gate resistance generating high thermal noise becomes larger under wider finger width. We can obtain good RF characteristics for MOSFETs by using a layout optimization technique.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.522-529
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• 2013

In this paper, simple but very effective techniques to suppress subthreshold hump effect for high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) technology are presented. Two methods are proposed to suppress subthreshold hump effect using a simple layout modification approach. First, the uniform gate oxide method is based on the concept of an H-shaped gate layout design. Second, the gate work function control method is accomplished by local ion implantation. For our experiments, $0.18{\mu}m$ 20 V class HV CMOS technology is applied for HV MOSFETs fabrication. From the measurements, both proposed methods are very effective for elimination of the inverse narrow width effect (INWE) as well as the subthreshold hump.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1619-1626
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• 2017

Electronic components that are used in high-level radiation environment require a semiconductor device having a radiation-hardened characteristic. In this paper, we proposed a radiation-hardened I-gate n-MOSFET (n-type Metal Oxide Semiconductors Field Effect Transistors) using a layout modification technique only. The proposed I-gate n-MOSFET structure is modified as an I-shaped gate poly in order to mitigate a radiation-induced leakage current in the standard n-MOSFET structure. For verification of its radiation-hardened characteristic, the M&S (Modeling and Simulation) of the 3D (3-Dimension) structure is performed by TCAD (Technology Computer Aided Design) tool. In addition, we carried out an evaluation test using a $Co^{60}$ gamma-ray source of 10kGy(Si)/h. As a result, we have confirmed the radiation-hardened level up to a total ionizing dose of 20kGy(Si).

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11a
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• pp.361.2-361
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• 2002

Substructures position is considered as design parameter to obtain optimal structural changes to raise its dynamic characteristics. In conventional SDM (structural dynamics modification) method, the layout of modifying substructures position is first fixed and at that condition the structural optimization is performed by using the substructures size and/or material property as design parameters. But in this paper as a design variable substructures global translational and rotational position is treated. (omitted)

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.102-106
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• 2005

A low dark current CMOS image sensor (CIS) pixel without any process modification is developed. Dark current is mainly generated at the interface region of shallow trench isolation (STI) structure. Proposed pixel reduces the dark current effectively by separating the STI region from the photodiode junction using simple layout modification. Test sensor array that has both proposed and conventional pixels is fabricated using 0.18 m CMOS process and the characteristics of the sensor are measured. The result shows that the dark current of the proposed pixel is 0.93fA/pixel that is two times lower than the conventional design.

• Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
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• v.3 no.4
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• pp.349-358
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• 2005

In this study, analysis of the disposal tunnel spacing and disposal pit pitch was carried out, as a factor of the design to estimate the scale and layout of the repository. To do this, based on the reference repository concept and the engineered barrier concept, several cross sections of the disposal tunnel and disposal pit were established. After then, the mechanical and thermal stabilities of the established tunnels were analyzed. Also, an optimized disposal tunnel spacing and the disposal pit pitch reducing the excavation volume was proposed. The results of these analyses can be used in the deep geological repository design. The detailed analyses by the exact site characteristics data to reduce the uncertainty of the site and the modification for the optimization are required.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.4
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• pp.1765-1794
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• 2019

Genetic Programming (GP) is an intelligence technique whereby computer programs are encoded as a set of genes which are evolved utilizing a Genetic Algorithm (GA). In other words, the GP employs novel optimization techniques to modify computer programs; imitating the way humans develop programs by progressively re-writing them for solving problems automatically. Trial programs are frequently altered in the search for obtaining superior solutions due to the base is GA. These are evolutionary search techniques inspired by biological evolution such as mutation, reproduction, natural selection, recombination, and survival of the fittest. The power of GAs is being represented by an advancing range of applications; vector processing, quantum computing, VLSI circuit layout, and so on. But one of the most significant uses of GAs is the automatic generation of programs. Technically, the GP solves problems automatically without having to tell the computer specifically how to process it. To meet this requirement, the GP utilizes GAs to a "population" of trial programs, traditionally encoded in memory as tree-structures. Trial programs are estimated using a "fitness function" and the suited solutions picked for re-evaluation and modification such that this sequence is replicated until a "correct" program is generated. GP has represented its power by modifying a simple program for categorizing news stories, executing optical character recognition, medical signal filters, and for target identification, etc. This paper reviews existing literature regarding the GPs and their applications in different scientific fields and aims to provide an easy understanding of various types of GPs for beginners.

• Journal of the Korean Association of Geographic Information Studies
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• v.14 no.2
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• pp.128-137
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• 2011

The purpose of the FAPIS(Forest Aerial Photograph Interpretation System) development is to increase accuracy and efficiency of the digital forest cover type mapping for improving conventional analog-based mapping procedures by optimizing work-flow and mapping technology. The database models including digital forest cover type map, aerial photograph, and topographic map were designed for use in this system construction. The interface configured concisely to connect with functions such as search engine, display control, conversion to stereo interpretation mode, modification tools, automation of print layout and database models. It is expected that the standardization methodology based on this system can be applied and extended in making all kinds of digital thematic maps, providing decision-making and information of forest resources.