• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.113-114
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• 2007

Hole mobility characteristics of single surface channel and dual channel Si/SiGe structure are compared, where the former one consists of a relaxed SiGe buffer layer and a tensile strained Si layer on top, and for dual channel structure a compressively strained SiGe layer is inserted between them. Due to the difference of hole mobility enhancement factors of layers between them, hole mobility characteristics with respect to the Si cap thickness shows the opposite tend. Hole mobility increases with thicker Si cap for single channel structure, whereas it decreases with thicker Si cap for dual channel structure.

• ETRI Journal
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• 제31권6호
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• pp.653-659
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• 2009

We have investigated the channel protection layer (PL) effect on the performance of an oxide thin film transistor (TFT) with a staggered top gate ZnO TFT and Al-doped zinc tin oxide (AZTO) TFT. Deposition of an ultra-thin PL on oxide semiconductor films enables TFTs to behave well by protecting the channel from a photo-resist (PR) stripper which removes the depleted surface of the active layer and increases the carrier amount in the channel. In addition, adopting a PL prevents channel contamination from the organic PR and results in high mobility and small subthreshold swings. The PL process plays a critical role in the performance of oxide TFTs. When a plasma process is introduced on the surface of an active layer during the PL process, and as the plasma power is increased, the TFT characteristics degrade, resulting in lower mobility and higher threshold voltage. Therefore, it is very important to form an interface using a minimized plasma process.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.252-253
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• 2011

ZnO-based thin film transistors (TFTs) are of great interest for application in next generation flat panel displays. Most research has been based on amorphous indium-gallium-zinc-oxide (IGZO) TFTs, rather than single binary oxides, such as ZnO, due to the reproducibility, uniformity, and surface smoothness of the IGZO active channel layer. However, recently, intrinsic ZnO-TFTs have been investigated, and TFT- arrayss have been demonstrated as prototypes of flat-panel displays and electronic circuits. However, ZnO thin films have some significant problems for application as an active channel layer of TFTs; it was easy to change the electrical properties of the i-ZnO thin films under external conditions. The variable electrical properties lead to unstable TFTs device characteristics under bias stress and/or temperature. In order to obtain higher performance and more stable ZnO-based TFTs, HZO thin film was used as an active channel layer. It was expected that HZO-TFTs would have more stable electrical characteristics under gate bias stress conditions because the binding energy of Hf-O is greater than that of Zn-O. For deposition of HZO thin films, Hf would be substituted with Zn, and then Hf could be suppressed to generate oxygen vacancies. In this study, the fabrication of the oxide-based TFTs with HZO active channel layer was reported with excellent stability. Application of HZO thin films as an active channel layer improved the TFT device performance and bias stability, as compared to i-ZnO TFTs. The excellent negative bias temperature stress (NBTS) stability of the device was analyzed using the HZO and i-ZnO TFTs transfer curves acquired at a high temperature (473 K).

• 전자공학회논문지 IE
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• 제49권2호
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• pp.46-51
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• 2012

AT-DMB 시스템의 신호 전송은 향상계층은 채널등화를 거친 Coherent Detection을 사용하지만 기본계층은 T-DMB와 마찬가지로 차동변복조를 사용한다. 본 논문에서는 이와같은 구조에서 어차피 향상계층 수신을 위하여 사용되는 채널추정 결과를 기본계층에 적용하여 기본계층의 수신성능을 향상시킬 수 있음을 보여준다. 제안하는 방법은 AT-DMB 수신단의 차동복조앞단에서 수신신호에 채널등화를 적용한 후 수신신호 성상도를 가장 가까운 ${\pi}$/4-shift DQPSK 성상도점으로 집중화시킨 후 차동복조를 적용함으로서 코딩을 적용하지 않은 상태에서 AWGN $10^{-4}BER$ 기준으로 약 2dB 성능향상을 얻을 수 있음을 보였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.430-430
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• 2010

MICC 방법으로 제작된 TFT는 large grain과 그에 따른 grain boundary의 감소로 인하여여, 소자의 전기적 특성을 좋게 할 수 있다. 본 연구에서는 bi-layer channel의 large grain size TFT를 제작하여 소자의 전기적 특성을 비교하였다. Channel의 width / length의 크기는 각 각의 경우 $7/5{\times}2$, $10/5{\times}2$, $15/5{\times}2$ (${\mu}m$)로 하였다. 소자의 성능 측정 결과 Field-effect mobility의 경우에는 channel width가 증가할 수록 감소하는 경향성을 나타내었으며, Threshold voltage의 경우에는 조금 감소하는 경향성은 있었으나 변화의 폭이 매우 작았다. Output characteristics 의 경우에는 모든 set에서 좋은 saturation 특성을 보였다. 이것은 current croding이 없었다는 것을 의미하는데, 큰 grain size로 인한 효과로 해석 할 수 있다. 본 연구에서는 bi-layer channel에서 corner effect에 중점을 두어 소자의 전기적 특성 변화에 대하여 논하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제15권6호
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• pp.2255-2281
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• 2021

Channel characteristic-based physical layer authentication is one potential identity authentication scheme in wireless communication, such as used in a fog computing environment. While existing channel characteristic-based physical layer authentication schemes may be efficient when deployed in the conventional wireless network environment, they may be less efficient and practical for the industrial wireless communication environment due to the varying requirements. We observe that this is a topic that is understudied, and therefore in this paper, we review the constructions and performance of several commonly used test statistics and analyze their performance in typical industrial wireless networks using simulation experiments. The findings from the simulations show a number of limitations in existing channel characteristic-based physical layer authentication schemes. Therefore, we believe that it is a good idea to combine machine learning and multiple test statistics for identity authentication in future industrial wireless network deployment. Four machine learning methods prove that the scheme significantly improves the authentication accuracy and solves the challenge of choosing a threshold.

• Transactions on Electrical and Electronic Materials
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• 제18권5호
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• pp.250-252
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• 2017

High-performance full swing logic inverters were fabricated using amorphous 1 wt% Si doped indium-zinc-oxide (a-SIZO) thin films with different channel layer thicknesses. In the inverter configuration, the threshold voltage was adjusted by varying the thickness of the channel layer. The depletion mode (D-mode) device used a TFT with a channel layer thickness of 60 nm as it exhibited the most negative threshold voltage (-1.67 V). Inverters using enhancement mode (E-mode) devices were fabricated using TFTs with channel layer thicknesses of 20 or 40 nm with excellent subthreshold slope (S.S). Both the inverters exhibited high voltage gain values of 30.74 and 28.56, respectively at $V_{DD}=15V$. It was confirmed that the voltage gain can be improved by increasing the S.S value.

• 한국정보통신학회논문지
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• 제10권12호
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• pp.2258-2263
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• 2006

본 논문은 shallow trench isolation (STI) 공정에서 ILD (inter-layer dielectric) 막의 수분에 의해 야기되는 단 채널 (short-channel) nMOSFET의 hump 특성의 원인을 분석하고 억제 방법을 제안하였다. 다양한 게이트를 가지는 소자와 TDS-APIMS(Thermal Desorption System-Atmospheric Pressure Ionization Mass Spectrometry) 측정을 이용하여 hump 특성을 체계적으로 분석하였고, 분석을 바탕으로 단 채널 hump모델을 제안하였다. 제안된 모델에 의한 단 채널 nMOSFET의 hump 현상은 poly-Si 게이트 위의 ILD 막의 수분이 상부의 SiN 막에 의해 밖으로 확산되지 못하고 게이트와 STI의 경계면으로 확산하여 발생한 것이 며, 이를 개선하기 위해 상부의 SiN 막의 증착 전 열공정을 통해 ILD 막의 수분을 효과적으로 배출시킴으로써 hump 특성을 성공적으로 억제하였다.

• 한국가시화정보학회지
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• 제15권3호
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• pp.27-33
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• 2017

Direct numerical simulations of turbulent channel flows with moving wall conditions on the top wall are performed to examine the effects of the moving wall on the turbulent characteristics. The moving wall velocity only applied to the top wall with the opposite direction to the main flow is systematically varied to reveal the sustained-mechanism for turbulence. The turbulence statistics for the Couette-Poiseuille flow, such as mean velocity, root mean square of the velocity fluctuations, Reynolds shear stress and pre-multiplied energy spectra of the velocity fluctuations, are compared with those of canonical turbulent channel flows. The comparison suggests that although the turbulent activity on the top wall increases with increasing the Reynolds number, that on the bottom wall decreases, contrary to the previous finding for the canonical turbulent channel flows. The increase of the turbulent energy on the top wall is attributed to not only the increase of the Reynolds number but also elongation of the logarithmic layer due to increase of the wall layer on the top wall. However, because the logarithmic layer is shortened on the bottom wall due to the decrease of the wall layer, the turbulence energy on the bottom wall decreases despite of the increase of the Reynolds number.

• International journal of advanced smart convergence
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• 제10권1호
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• pp.142-150
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• 2021

Open-channel SSD is a new type of Solid-State Disk (SSD) that improves the garbage collection overhead and write amplification due to physical constraints of NAND flash memory by exposing the internal structure of the SSD to the host. However, the host-level Flash Translation Layer (FTL) provided for open-channel SSDs in the current Linux kernel consumes host memory excessively because it use page-level mapping table to translate logical address to physical address. Therefore, in this paper, we implemente a selective mapping table loading scheme that loads only a currently required part of the mapping table to the mapping table cache from SSD instead of entire mapping table. In addition, to increase the hit ratio of the mapping table cache, filesystem information and mapping table access history are utilized for cache replacement policy. The proposed scheme is implemented in the host-level FTL of the Linux kernel and evaluated using open-channel SSD emulator. According to the evaluation results, we can achieve 80% of I/O performance using the only 32% of memory usage compared to the previous host-level FTL.