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Moisture Induced Hump Characteristics of Shallow Trench-Isolated nMOSFET  

Lee, Young-Chul (목포해양대학교 해양전자통신공학부)
Abstract
In this parer, hump characteristics of short-channel nMOSFETs induced by moistures of the ILD(inter-layer dielectric) layer in the shallow trench isolation (STI) process are investigated and the method for hump suppression is proposed Using nMOSFETs with various types of the gate and a measurement of TDS-APIMS (Thermal Desorption System-Atmospheric Pressure ionization Mass Spectrometry), hump characteristics were systematically analyzed and the systemic analysis based hump model was presented; the ILD layer over poly-Si gate of nMOSFET generates moistures, but they can't diffuse out of the SiN layer due to the upper SiN layer. Consequently, they diffuses into the edge between the gate and STI and induces short-channel hump. In order to eliminate moisture in the ILD layer by out-gassing method, the annealing process prior to the deposition of the SiN layer was carried out. As the result, short-channel humps of the nMOSFETs were successfully suppressed.
Keywords
nMOSFET; Hump; STI; Short-channel; ILD;
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1 Akira Mizumura, Tetsuya Oishi, Nobuhiko Yokoyama, Mie Nonaka, Shigeyuki Tanaka, and Hiroaki Ammo, 'Study of 90-nrn MOSFET Subthreshold Hump Characteristics Using Newly Developed MOSFET Array Test Structure', IEEE trans. on Semiconductor Manufacturing, vol. 19, no. 1, pp.19-26, 2006   DOI   ScienceOn
2 Jung-Hwan Lee, Won-Kyu Park, Eun-Young Chung, Young-Hee Kim, and Chang-Kyu Choi, 'Analysis of Water Diffusion Path Evolving From Silicon Dioxide and Its Influence on Transistor Hump', IEEE Trans. On Electron Devices, vol. 53,no. 4, pp.790-796, 200   DOI   ScienceOn
3 Sung-Kye Park, Moon-Sik Sub, Jae-Young Kim, Gyu-Han Yoon, and Sung-Ho Jang, 'CMOSFET Characteristics Induced by Moisture Diffusion from Inter-Layer Dielectric in 0.23 um DRAM Technology with Shallow Trench Isolation' IEEE International Reliability Physics Symposium, pp.164-168, 2000
4 G. Fuse, S. Shibata, and Y. Kato, 'Nchannel MOS FET Degradation by Source/Drain Implantation', Proceedings of the 11th International Conference on Ion Implantation Technology, pp. 642-645, 1996
5 Hsin-Yi Lee; Chih-Sheng Chang; Ting-Hua Hsieh; Jyh-Chyurn Guo, 'Subthreshold hump mechanisms for both surface and buried channel MOSFET using STI technology', Proceeding of the 30th European Solid-State Device Research Conference, pp. 108-111, 2000
6 K. Taniguchi, K. Kurosawa, and M. Kashiwagi, 'Oxidation enhanced diffusion of boron and phosphorus in (100) silicon,' J. Electrochem Soc., vol. 127, no. 10, pp.2243 - 2248, 1980   DOI
7 M. Nandakumar, A. Chatterjee, S. Sridhar, K. Joyner, M. Rodder, and I.-C. Chen, 'Shallow trench isolation for advanced ULSI CMOS technologies', Proceeding of IEEE International Electron Devices Meeting (IDEM), pp. 133 - -136,1988
8 Brut, H.; Velghe, R.M.D.A., 'Contribution to the characterization of the hump effect in MOSFET submicronic technologies' International Conference on Microelectronic Test Structures (ICMTS), pp. 188- 193, 1999