• Title/Summary/Keyword: LTPS

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Excimer-Laser Annealing for Low-Temperature Poly-Si TFTs

  • Kim, Hyun-Jae
    • Journal of Information Display
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    • v.4 no.4
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    • pp.1-3
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    • 2003
  • For excimer laser annealing (ELA), energy density, number of pulses, beam uniformity, and condition of initial amorphous Si (a-Si) films are significant factors contributing to the final microstructure and the performance of low-temperature polycrystalline Si (LTPS) TFTs. Although the process and equipment have been significantly improved, the environmental factors associated with initial amorphous Si (a-Si) films and process conditions are yet to be optimized.

Pixel Circuit with High Immunity to the Degradation of TFTs and OLED for AMOLED Displays

  • Lin, Chih-Lung;Tu, Chun-Da
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.473-476
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    • 2008
  • A simple voltage compensation pixel circuit for AMOLED is produced using low temperature polycrystalline silicon (LTPS) technology. Its operation is verified by AIM-SPICE. Simulation results show that the pixel circuit has high immunity to variation of LTPS-TFT and reduces the drop in luminance due to the degradation of the OLED.

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Development of Rapid Thermal Processor for Large Glass LTPS Production

  • Kim, Hyoung-June;Shin, Dong-Hoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.533-536
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    • 2006
  • VIATRON TECHNOLOGIES has developed Field-Enhanced Rapid Thermal Processor (FERTP) system that enables LTPS LCD and AMOLED manufacturers to produce poly-Si films at low cost, high throughput, and high yield. The FE-RTP allows the diverse process options including crystallization, thermal oxidation of gate oxides and fast pre-compactions. The process and equipment compatibility with a-Si TFT lines is able to provide a viable solution to produce poly-Si TFTs using a-Si TFT lines.

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New High-Voltage Generator with Several mA Output Currents using Low Temperature Poly Silicon (LTPS) Technology for TFT-LCD Panel

  • Akiyama, Yuuki;Suzuki, Yasoji;Ishii, Noriyuki;Murata, Shinichi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.218-221
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    • 2006
  • In this paper, a high-voltage generator with several mA draw output currents using LTPS-TFT technology is proposed. The new generator can be efficiently boosted about +18V output voltages with 5mA draw output currents and power efficiency ${\eta}$ is around 84% under the conditions of +5V power-supply voltage and 250kHz frequency.

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System Interface for SoG in LTPS TFT Process

  • Min, Kyung-Youl;Yoo, Chang-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1791-1794
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    • 2006
  • For system-on-glass (SoG) with low-temperature poly-silicon (LTPS) thin film transistor (TFT), a new system interface architecture and timing controller are developed. With the newly developed system interface architecture, line memory can be eliminated which would take large area of SoG display panel. The system interface and timing controller are targeted for the application for 6-bit gray scale, 60-frames/s qVGA format.

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A five mask CMOS LTPS process with LDD and only one ion implantation step

  • Schalberger, Patrick;Persidis, Efstathios;Fruehauf, Norbert
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1645-1648
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    • 2006
  • We have developed a CMOS LTPS process, which requires only five photolithographic masks and only one ion doping step. Single TFTs, inverters, ring oscillators and shift registers were fabricated. N- and p-channel devices reached field effect mobilities of $173cm^2/Vs$ and $47cm^2/Vs$, respectively.

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Novel high speed and sensitivity array test system for LTPS LCD and OLED

  • Chikamatsu, Kiyoshi;Miyake, Yasuhiro;Tajima, Kayoko;Goto, Masaharu;Mizoguchi, Junichi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1447-1450
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    • 2006
  • The high speed and sensitivity array test system has been developed and utilized for massproduction of advanced LTPS displays including SOG and OLED. It realizes fast enough TACT enabling 100% inspection with better than 1fF sensitivity. The result of actual measurement shows its superior TACT and sensitivity, and also shows MURA detection of OLED panel.

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Low Temperature Poly-Si TFT Technology for Small Sized TFT-LCDs

  • Ha, Yong-Min
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.42-45
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    • 2002
  • Small sized LTPS TFT-LCDs are developed and evaluated. Sine the fabrication process is optimized for the productivity of huge glass substrate, the pattern size is above 5${\mu}m$. The panels with integrated digital data drivers are not satisfactory to compete with a-Si technology. Therefore, LTPS panels are implemented by PMOS technology and it is proved that they can be competitive with a-Si TFT-LCDs in terms of performance and cost.

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A Five Mask CMOS LTPS Process With LDD and Only One Ion Implantation Step

  • Schalberger, Patrick;Persidis, Efstathios;Fruehauf, Norbert
    • Journal of Information Display
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    • v.8 no.1
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    • pp.1-5
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    • 2007
  • We have developed a CMOS LTPS process which requires only five photolithographic masks and only one ion doping step. Drain/Source areas of NMOS TFTs were formed by PECVD deposition of a highly doped precursor layer while PMOS contact areas were defined by ion implantation. Single TFTs, inverters, ring oscillators and shift registers were fabricated. N and p-channel devices reached field effect mobilities of $173cm^2$/Vs and $47cm^2$/Vs, respectively.