• Journal of Practical Engineering Education
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• v.10 no.2
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• pp.125-129
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• 2018

This paper is about the numerical analysis on optimized internal flow of LTP furnace and uniformity of temperature. The LTP Furnace is the device that generates heat by electricity. And performs an annealing function for annealing the silicon wafer in the pre-semiconductor manufacturing process. Especially, the maximum temperature inside the chamber is maintained at a high temperature of about $400^{\circ}C$ to strengthen the wafer. When the process is completed at high temperature, the operation is repeated to reduce the temperature through the heat exchanger and carry it out. From this analysis, the ultimate goal is to derive the optimum design of the insulation volume supply/exhaust structure of the chamber through the flow analysis of the LTPS furnace. And to find cases for curriculum development.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.98-106
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• 2009

This work proposes a 1280-RGB $\times$ 800-Dot 70.78mW 0.l3um CMOS LCD driver IC (LDI) for high-performance 16M-color low temperature poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) systems such as ultra mobile PC (UMPC) and mobile applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed LDI optimizes power consumption and chip area at high resolution based on a resistor-string based architecture. The single column driver employing a 1:12 MUX architecture drives 12 channels simultaneously to minimize chip area. The implemented class-AB amplifier achieves a rail-to-rail operation with high gain and low power while minimizing the effect of offset and output deviations for high definition. The supply- and temperature-insensitive current reference is implemented on chip with a small number of MOS transistors. A slew enhancement technique applicable to next-generation source drivers, not implemented on this prototype chip, is proposed to reduce power consumption further. The prototype LDI implemented in a 0.13um CMOS technology demonstrates a measured settling time of source driver amplifiers within 1.016us and 1.072us during high-to-low and low-to-high transitions, respectively. The output voltage of source drivers shows a maximum deviation of 11mV. The LDI with an active die area of $12,203um{\times}1500um$ consumes 70.78mW at 1.5V/5.5V.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.309-314
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• 2004

Static and transient behaviour of Low Temperature Poly-Si TFTs (LTPS-TFTs) and Single Grain TFTs (SG- TFTs) are compared 3-D simulation is applied here for the first time to TFTs to account for the structure and twin boundaries in SG-TFTs.

• Information Display
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• v.6 no.5
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• pp.4-9
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• 2005

There has been a new trend to integrate various kinds of circuits by low temperature polycrystalline silicon thin film transistor (LTPS TFT) on insulator substrates to achieve System on Panel (SOP) for flat panel displays. In this paper, we will review the trend of the SOP and discuss the utility and future possibility of the SOP.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1061-1064
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• 2007

Thin Beam Excimer Laser Annealing is investigated as one possible process enabled by the variable concept of Thin Beam LTPS processing. The structure of the resulting p-Si material is analyzed in terms of grain size distribution, scaling with energy density and overlap, as well as average surface roughness. This process provides similar control and latitude as conventional excimer laser annealing, but reduced average surface roughness and the potential to be scaled to significant productivity levels.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1263-1265
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• 2007

The electrical characteristics of low temperature poly-Si (LTPS) thin-film transistors (TFT) with channel parallel and perpendicular to the direction of lateral growth were studied. The poly-Si film was crystallized using sequential lateral solidification (SLS) laser crystallization technique. The channel orientation dependent turn-on characteristics were investigated by using gated-diodes and capacitance-voltage measurements

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1168-1171
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• 2007

Integrating systems on TFT-LCD panels is more and more popular for the mobile display application. However, it may not be necessary to use LTPS TFT devices. A-Si TFTs are used to integrate systems on TFT-LCD panels, especially scan (gate) drivers. To further reduce the chip size of driver IC, the triplegate pixel structure is developed. Therefore, the number of the source lines is reduced to 1/3 times.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.13-16
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• 2008

Mobile phones are evolving into a platform for internet access. In order to display web pages in handsets, WVGA and around 3-inch displays are strongly recommended. Low power consumption, compactness and narrow boarder area are essential. The general requirements for WVGA solution and the design factors to reduce the power consumption and boarder area discussed.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.665-668
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• 2006

Sodium is a serious contamination in LTPS TFT process. It causes the abnormal characteristics of TFT in operation. Contaminated areas can be seen in SEM images, but EDX measurements do not have adequate sensitivity to confirm the presence of superficial sodium residues. We employed SIMS as a fast analysis method to map the non-uniform distribution of sodium on the surface. SIMS can also indicate the thickness of the contamination.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.841-844
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• 2005

There has been a new trend to integrate various kinds of circuits by low temperature polycrystalline silicon thin film transistor (LTPS TFT) on insulator substrates to achieve System on Panel (SOP) for flat panel displays. In this paper, we will review the trend of the SOP and discuss the utility and future possibility of the SOP.