• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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• pp.220-223
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• 2005

We studied the effect of composition, processing, and sintering temperature on the microwave properties of $Mg_{3-x}Co_x(VO_4)_2$ system which is applicable to LTCC. When $Mg_{3-x}Co_x(VO_4)_2$ was fabricated by solid-state reaction process and sintered at the temperature range of $800\sim910^{\circ}C$, it was found that the optimum composition of x was 2 at which microwave properties of 910$^{\circ}C$-sintered one were as follows: $Q\times f_0\sim55,200GHz$ and $\varepsilon_r\sim10$. When $(MgCo_2)(VO_4)_2$ was fabricated by sol-gel process and sintered at 800$^{\circ}C$, $Q\timesf_0$was 34,400GHz which is much high compared to those fabricated by solid-state reaction process at the same sintering temperature.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.342-345
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• 2002

As the size of chip components and module decreases, new patteming method for fine line and geometry is needed. So far, in LTCC(Low Temperature Cofired Ceramic) process, screen printing method has been used generally. But screen printing method has some disadvantages as follows. First, the geometry including line, vias, etc. smaller than $100{\mu}m$ can't be evaluated easily. Second, the patterned dimension is different from designed value, which makes distortion in charactersitics of not only chip components but also modules. Thick film lithography has advantages of thick film screen printing process, low cost and thin film process, fine line feasibility. Using this method, the line with $30{\mu}m$ width and the geometry with expected dimension can be evaluated. In this study, the fine line with $35{\mu}m$ line/space is formed and the embedded capacitor with very small tolerance is developed using thick film lithography.

• 한국통신학회논문지
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• 제32권5A호
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• pp.490-496
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• 2007

본 논문에서는 IEEE802.11a 무선랜용 Front-End 집적화 초소형 모듈을 측정기반 거동 모델을 기반으로 한 behavioral-level 시뮬레이션을 수행하여 설계 제작 하였다. IEEE802.11a 무선랜 표준을 만족시키기 위해 54Mbps 전송속도의 64QAM 변조 방식 심볼을 1024개 전송하는 시스템을 구현하고 이 환경에서 ACPR과 EVM 시뮬레이션을 수행하여 비선형 특성을 확인하였다. 중심주파수 5.8GHz에서 30MHz, 20MHz와 11MHz 떨어진 ACPR의 우측 offset은 각각 49.36dBc, 36.90dBc와 24.58dB이고 좌측 Offset은 각각 50.14dBc, 34.04dBc와 28.85dBc이며 EVM은 2.94%이다. LTCC 공정을 사용하여 5층 기판으로 제작한 모듈의 크기는 $13.4mm{\times}14.2mm$이다. 송신단 특성은 P1dB가 16.2dBm, 전력이득은 16.73dB로, 수신단의 특성은 소신호 이득이 16.24dB, 잡음지수가 7.83dB로 측정되었다.

• 마이크로전자및패키징학회지
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• 제13권3호
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• pp.33-38
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• 2006

유리 조성이 섞인 유전체 파우더와 증류수 그리고 해교제의 혼합으로 만들어진 슬러리를 에어로졸 형태로 고압 스프레이 건으로 기판에 스프레이 코팅 하였다. 기판으로는 알루미나 기판과 전극 패턴이 프린트 된 그린쉬트를 사용하였다. 슬러리 점도와 스프레이 건에 의한 분사모양 그리고 슬러리의 분사량은 코팅 층의 코팅 속도에 영향을 끼쳤으나 밀도에는 거의 영향을 주지 않았다. 고압 스프레이 코팅 방법은 기판에 직접적인 가압 과정이 없으므로 내부 전극은 인쇄된 형태가 유지되었다. 최적 조건에서는 균일하고 조밀한 코팅 층을 얻을 수 있었다. 또한 그린쉬트에 적층 공정을 사용한 기존의 방법과는 달리 고압 스프레이 코팅 방법은 $20{\sim}50{\mu}m$의 얇은 유전체 층을 얻을 수 있었다.

• 마이크로전자및패키징학회지
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• 제18권4호
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• pp.63-70
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• 2011

Anorthite forming glass frits in amounts up to 25 vol% of the silver powder were added to improve the adhesion between the conductor pattern formed by thick film photoimageable process and the low temperature co-fired ceramics (LTCC) substrate. The sheet resistance of the conductor pattern was raised from 0.13 ${\Omega}/{\square}$ to 2.25 ${\Omega}/{\square}$ as the volume percentage of glass frit increased up to 25 vol%. The adhesion strength was improved with this glass frit increase, but it decreased when the glass content exceeded 20 vol% which are possibly attributed to the liquid pool effect and the reduced fracture toughness in the interface between conductor and LTCC layer. The shrinkage of the width of the conductor pattern decreased with the addition of glass contents.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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• pp.607-610
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• 2003

The characteristic prediction and analysis of 3-dimensional (3-D) solenoid-type embedded inductors is investigated. The four different structures of 3-D inductor are fabricated by using low-temperature cofired ceramic (LTCC) process. The circuit model parameters of the each building block are optimized and extracted using the partial element equivalent circuit method and HSPICE circuit simulator. Based on the model parameters, predictive modeling is applied for the structures composed of the combination of the modeled building blocks. And the characteristics of test structures, such as self-resonant frequency, inductance and Q-factor, are analyzed. This approach can provide the characteristic conception of 3-D solenoid embedded inductors for structural variations.

• 한국분말야금학회:학술대회논문집
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• 한국분말야금학회 2006년도 Extended Abstracts of 2006 POWDER METALLURGY World Congress Part2
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• pp.1232-1233
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• 2006

To co-fire with commercial LTCC (Low Temperature Co-fired Ceramic) materials at $850^{\circ}C{\sim}880^{\circ}C$, different contents of $B_2O_3$ were added to the $Bi_2O_3-ZnO-Nb_2O_5$ (BZN) ceramics. According to the test results, the cubic phase of BZN was transformed into orthorhombic in all the test materials. $BiNbO_4$ phase was formed in test materials with $2{\sim}5wt%$ of $B_2O_3$ addition. The phase transformation of cubic BZN was controlled during the synthesis process with excess ZnO content. The Cubic and orthorhombic phases of BZN could coexist and be sintered densely at $850^{\circ}C/2hr$.

• ETRI Journal
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• 제28권3호
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• pp.347-354
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• 2006

The characteristic variation of 3-dimensional (3-D) solenoid-type embedded inductors is investigated. Four different structures of a 3-D inductor are fabricated by using a low-temperature co-fired ceramic (LTCC) process, and their s-parameters are measured between 50 MHz and 5 GHz. The circuit model parameters of each building block are optimized and extracted using the partial element equivalent circuit method and an HSPICE circuit simulator. Based on the model parameters, the characteristics of the test structures such as self-resonant frequency, inductance, and quality (Q) factor are analyzed, and predictive modeling is applied to the structures composed of a combination of the modeled building blocks. In addition, characteristic variations of the 3-D inductors with different structures using extracted building blocks are also investigated. This approach can provide a characteristic estimation of 3-D solenoid embedded inductors for structural variations.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.303-303
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• 2007

Photo-imageable thick-film lithography technology was developed for the fabrication of embedded passives such as inductors and capacitors. In this study, photo-imageable dielectric and conductor pastes have apoted a negative type. Sodalime glass wafer, alumina substrate and zero-shrinkage LTCC green tapes were used as substrates. In result, The lithographic patterns were designed as lines and spaces for conductor material, or via-holes for ceramic, LTCC, materials. The scattering and reflection of UV-beam on the substrate had negative effects on fine patterning. The patterning performance was varied with the exposing and developing process conditions, and also varied with the substrate materials. Fine resolution of less then $50/50{\mu}m$ in line and space was obtained, which is difficult in screen printing method.

• Transactions on Electrical and Electronic Materials
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• 제12권1호
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• pp.32-34
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• 2011

A zero-shrinkage sintering process in which the shrinkage of the x-y axis is controlled to be zero is in great demand due to the high integration trend in ceramic modules. Among the zero-shrinkage sintering processes available, the glass infiltration method proposed in the preliminary study with an $Al_2O_3/Glass/Al_2O_3$ structure is one promising method. However, problems exist in regard to the glass infiltration method, including partially incomplete joining between $Al_2O_3$ and glass layers due to the precipitate of Ti-Pb rich phase during the sintering process. Therefore, we wish to solve the de-lamination problems and suggest a mechanism for delamination and the solutions in the zero-shrinkage low temperature co-fired ceramic (LTCC) layers. The de-lamination problems diminished using the Pb-BSi-O glass without $TiO_2$ in Pb-B-Ti-Si-O glass and produced a very dense zero-shrinkage LTCC.