• Transactions on Electrical and Electronic Materials
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• v.10 no.4
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• pp.131-134
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• 2009

The electrical properties and the microstructure of nitrogen-doped poly 3C-SiC films used for micro thermal sensors were studied according to different thicknesses. Poly 3C-SiC films were deposited by LPCVD (low pressure chemical vapor deposition) at $900^{\circ}C$ with a pressure of 4 torr using $SiH_2Cl_2$ (100%, 35 sccm) and $C_2H_2$ (5% in $H_2$, 180 sccm) as the Si and C precursors, and $NH_3$ (5% in $H_2$, 64 sccm) as the dopant source gas. The resistivity of the poly SiC films with a 1,530 ${\AA}$ thickness was 32.7 ${\Omega}-cm$ and decreased to 0.0129 ${\Omega}-cm$ at 16,963 ${\AA}$. The measurement of the resistance variations at different thicknesses were carried out within the $25^{\circ}C$ to $350^{\circ}C$ temperature range. While the size of the resistance variation decreased when the films thickness increased, the linearity of the resistance variation improved. Micro heaters and RTD sensors were fabricated on a $Si_3N_4$ membrane by using poly 3C-SiC with a 1um thickness using a surface MEMS process. The heating temperature of the SiC micro heater, fabricated on 250 ${\mu}m$${\times}$250 ${\mu}m$ $Si_3N_4$ membrane was $410^{\circ}C$ at an 80 mW input power. These 3C-SiC heaters and RTD sensors, fabricated by surface MEMS, have a low power consumption and deliver a good long term stability for the various thermal sensors requiring thermal stability.

• New & Renewable Energy
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• v.18 no.1
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• pp.29-34
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• 2022

The most prevalent cause of solar cell efficiency loss is reduced recombination at the metal electrode and silicon junction. To boost efficiency, a a SiO_X/poly-Si passivating interface is being developed. Poly-Si for passivating contact is formed by various deposition methods (sputtering, PECVD, LPCVD, HWCVD) where the ploy-Si characterization depends on the deposition method. The sputtering process forms a dense Si film at a low deposition rate of 2.6 nm/min and develops a low passivation characteristic of 690 mV. The PECVD process offers a deposition rate of 28 nm/min with satisfactory passivation characteristics. The LPCVD process is the slowest with a deposition rate of 1.4 nm/min, and can prevent blistering if deposited at high temperatures. The HWCVD process has the fastest deposition rate at 150 nm/min with excellent passivation characteristics. However, the uniformity of the deposited film decreases as the area increases. Also, the best passivation characteristics are obtained at high doping. Thus, it is necessary to optimize the doping process depending on the deposition method.

• Journal of Sensor Science and Technology
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• v.18 no.2
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• pp.147-153
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• 2009

A thermal flow sensor has been fabricated and characterized, consisting of a center resistive heater surrounded by two upstream and one downstream temperature sensing resistors. The heater and temperature sensing resistors are fabricated from nitrogen-doped(n-type) polycrystalline silicon carbide(poly-SiC) deposited by LPCVD(low pressure chemical vapor deposition) on LPCVD silicon nitride films on a Si substrate. Cavities were etched into the Si substrate from the front side to create suspended silicon nitride membranes carrying the poly-SiC elements. One upstream sensor is located $50{\mu}m$ from the heater and has a sensitivity of $0.73{\Omega}$/sccm with ${\sim}15\;ms$ rise time in a dynamic range of 1000 sccm. N-type poly-SiC has a linear negative temperature coefficient and a TCR(temperature coefficient of resistance) of $-1.24{\times}10^{-3}/^{\circ}C$ from room temperature to $100^{\circ}C$.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.24-29
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• 2000

We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.356-356
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• 2010

In this paper, Poly silicon thin-film transistors (poly-Si TFTs) with employed the SPC (Solid phase crystallization) and ELA (Excimer laser annealing) methods on glass panel substrate are fabricated to investigate the electrical poperies. Poly-Si TFTs have recess-channel structure with formated source/drain regions by LPCVD n+ poly Si in low $650^{\circ}C$ temperature. the ELA-TFT show higher on/off current ratio and subthreshold swing than a-Si and SPC TFT that therefore, these results showed that the ELA-TFT might be beneficial for practical embedded TFT memory device application.

• Journal of the Korean Vacuum Society
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• v.11 no.1
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• pp.16-21
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• 2002

Selective epitaxial growth(SEG) of silicon were performed at low temperature under an ultraclean environment below $1000^{\circ}C$ using ultraclean $Si_2H_6$ and $H_2$ gases ambient in low pressure chemical vapor deposition(LPCVD). As a result of ultraclean processing, epitaxial Si layers with good quality were obtained for uniform and SEG wafer at temperatures range 600~$710^{\circ}C$ and an incubation period of Si deposition only on $SiO_2$ was found. Low-temperature Si selectivity deposition condition and epitaxy on Si were achieved without addition of HCl. The epitaxial layer was found to be thicker than the poly layer deposited over the oxide. Incubation period prolonged for 20~30 sec can be obtained by $O_2$addition. The surface morphologies & cross sections of the deposited films were observed with SEM, The structure of the Si films was evaluated XRD.

• Journal of the Korean Ceramic Society
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• v.41 no.9
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• pp.637-641
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• 2004

We investigated the effects of SiH$_4$ gas on the surface of Hf-silicate films during the deposition of polycrystalline (poly) Si films and the thermal stability of sputtered Hf-silicate films in poly Si/Hf-silicate structure by using High Resolution Transmission Electron Microscopy (HR-TEM) and X-ray Photoelectron Spectroscopy (XPS). Hf-silicate films were deposited by using DC-mag-netron sputtering with Hf target and Si target and poly Si films were deposited at 600$^{\circ}C$ by using Low Pressure Chemical Vapor Deposition (LPCVD) with SiH$_4$ gas. After poly Si film deposition at 600$^{\circ}C$, Hf silicide layer was observed between poly Si and Hf-silicate films due to the reaction between active SiH$_4$ gas and Hf-silicate films. After annealing at 900$^{\circ}C$, Hf silicide, formed during the deposition of poly Si, changed to Hf-silicate and the phase separation of the silicate was not observed. In addition, the Hf-silicate films remain amorphous phase.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.144-144
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• 2010

다결정 실리콘 박막트랜지스터 (poly-Si TFTs)는 벌크실리콘을 이용한 MOSFET소자에 비해 실리콘 박막의 형성이 간단하므로 대면적의 공정이 가능하며 다양한 기판위에 적용이 가능하여 LCD, OLED 등의 디스플레이 기기에 많이 이용되고 있다. 또한 poly-Si TFT는 3차원으로 적층된 소자의 제작이 가능하여 고집적의 한계를 극복할 소자로 주목받고 있다. 최근, DRAM은 캐패시터의 축소화와 구조적 공정이 한계점에 도달했으며 이를 극복하기 위하여 SOI 기판을 사용한 하나의 트랜지스터로 DRAM의 동작을 수행하는 1T-DRAM의 연구가 활발히 진행 중이다. 이러한 1T-DRAM 소자를 대면적과 다층구조의 공정이 가능한 poly-Si TFT를 이용하여 구현하면 초고집적의 메모리 소자를 제작 가능할 것이다. 따라서, 본 연구에서는 다결정 실리콘 박막트랜지스터 (poly-Si TFTs)를 이용한 1T-DRAM의 동작 특성을 연구하였다. 소자의 제작 방법으로는 200 nm의 열산화막이 성장된 p-type 실리콘 기판위에 상부실리콘으로 사용될 비정질 실리콘 박막을 LPCVD 방법으로 증착하였다. 다음으로 248 nm의 파장을 가지는 KrF 레이저를 이용한 eximer laser annealing (ELA) 공정을 통하여 결정화된 상부실리콘층에 TFT 소자를 제작하여 전기적 특성을 평가하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.408-409
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• 2006

The polycrystalline 3C-SiC thin films heteroepitaxially grown by LPCVD method using single precursor 1. 3-disilabutane at $850^{\circ}C$. The crystallinity of the 3C-SiC thin film. was analyzed by XPS. Residual strain was investigated by Raman scattering. The surface morphology and voids between SiC and $SiO_2$ were measured by SEM. The grown poly 3C-SiC thin film is very good crystalline quality, surface like mirror, and low defect and strain. Therefore, the polycrystalline 3C-SiC is suitable for harsh environment MEMS applications.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.489-490
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• 2008

As anodizing method using poly-Si (polycrystalline silicon) grown by LPCVD (Low Pressure Chemical Vapor Deposition), a ballistic electron emitter was made. An OPPS (Oxidized Porous Poly-Si) structure can generate ballistic electron which can pass through without scattering owing to electric field of oxide layer wrapped around nanocrystal due to applied voltage of between surface and bottom electrode. As electrode, (Al, Au and Pt/ti) were used. In this case, there were the better characteristics in Al and Pt/ti than in Al and Au.