• Journal of Sensor Science and Technology
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• v.26 no.6
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• pp.438-444
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• 2017

In this paper, we focus on optimization of the in-situ phosphorous (P) doping of low-pressure chemical vapor deposited (LPCVD) poly Si resistors for obtaining near-zero temperature coefficient of resistance (TCR) at temperature range from 25 to $600^{\circ}C$. The deposited poly Si films were annealed by rapid thermal anneal (RTA) process at the temperature range from 900 to $1000^{\circ}C$ for 90s in nitrogen ambient to relieve intrinsic stress and decrease the TCR in the poly Si layer and get the Ohmic contact. After the RTA process, a roughness of the thin film was slightly changed but the grain size and crystallinity of the thin film with the increase in anneal temperature. The film annealed at $1,000^{\circ}C$ showed the behavior of Schottky contact and had dislocations in the films. Ohmic contact and TCR of $334.4{\pm}8.2$ (ppm/K) within 4 inch wafer were obtained in the measuring temperature range of 25 to $600^{\circ}C$ for the optimized 200 nm thick-poly Si film with width/length of $20{\mu}m/1,800{\mu}m$. This shows the potential of in-situ P doped LPCVD poly Si as a resistor for pressure sensor in harsh environment applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.459-462
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• 2000

A new method for the fabrication of poly-Si films is reported using by alternating magnetic flux crystallization (AMFC) of LPCVD a-Si films. In this work we have studied the crystallization of LPCVD a-Si films by alternating magnetic flux. A-Si films were 1200$\AA$-thick deposited at 48$0^{\circ}C$ at a total pressure of 0.25Torr using Si$_2$H$_{6}$/H$_2$. After this step, these a-Si films were thermally annealed by Alternating Magnetic Flux at 43$0^{\circ}C$ for 1hours. The annealed films were characterized using X-ray diffraction (XRD), Raman Spectra, Atomic Force Microscopy(AFM). Both alternating magnetic flux crystallization and solid phase crystallization were investigated to compare enhanced crystallization a-Si. We have found that the low temperature crystallization method at 43$0^{\circ}C$ by alternating magnetic flux.x.

• Proceedings of the Materials Research Society of Korea Conference
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• 1996.11a
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• pp.113-113
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• 1996

• Transactions on Electrical and Electronic Materials
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• v.9 no.3
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• pp.101-104
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• 2008

The electrical properties and microstructure of nitrogen-doped poly 3C-SiC films were studied according to different thickness. Poly 3C-SiC films were deposited by LPCVD(low pressure chemical vapor deposition) at $900^{\circ}C$ and 4 Torr using $SiH_2Cl_2$ (100 %, 35 sccm) and $C_2H_2$ (5 % in $H_2$, 180 sccm) as the Si and C precursors, and $NH_3$ (5 % in $H_2$, 64 sccm) as the dopant source gas. The resistivity of the 3C-SiC films with $1,530{\AA}$ of thickness was $32.7{\Omega}-cm$ and decreased to $0.0129{\Omega}-cm$ at $16,963{\AA}$. In XRD spectra, 3C-SiC is so highly oriented along the (1 1 1) plane at $2{\theta}=35.7^{\circ}$ that other peaks corresponding to SiC orientations are not presented. The measurement of resistance variations according to different thickness were carried out in the $25^{\circ}C$ to $350^{\circ}C$ temperature range. While the size of resistance variation decreases with increasing the films thickness, the linearity of resistance variation improved.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.143-143
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• 2010

다결정 실리콘 (Poly-Si)은 LPCVD를 이용하여 $750^{\circ}C$에서 증착하였다. 증착된 실리콘 박막은 실란, 수소 및 헬륨 가스를 이용하여 증착하였다. 성장된 poly-Si의 특성은 Raman spectroscopy 및 SEM을 이용하여 분석하였다. 헬륨 가스의 양을 15 sccm으로 고정하고 실란과 수소의 가스비를 60:0에서 20:40까지 가변시켰다. 활성화 에너지는 전류-전압 측정을 통해 Arrhenius plot을 이용하여 계산하였다. 박막 트랜지스터는 quartz 기판 위에 제작되었다. 게이트 절연막으로 TEOS $SiO_2$를 이용하였으며 source 및 drain 전극으로 Al을 이용하였다. 이 때 제작된 박막 트랜지스터의 전류 점멸비, 전계 효과 이동도, SS 및 문턱 전압은 각각 $10^5$, $76\;cm^2/V-s$, 167 mV/decade 및 1.43 V이었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.8
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• pp.732-736
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• 2006

This paper describes the physical characterizations of polycrystalline 3C-SiC thin films heteroepitaxially grown on Si wafers with thermal oxide, In this work, the 3C-SiC film was deposited by LPCVD (low pressure chemical vapor deposition) method using single precursor 1, 3-disilabutane $(DSB:\;H_3Si-CH_2-SiH_2-CH_3)\;at\;850^{\circ}C$. The crystallinity of the 3C-SiC thin film was analyzed by XPS (X-ray photoelectron spectroscopy), XRD (X-ray diffraction) and FT-IR (fourier transform-infrared spectometers), respectively. The surface morphology was also observed by AFM (atomic force microscopy) and voids or dislocations between SiC and $SiO_2$ were measured by SEM (scanning electron microscope). Finally, residual strain was investigated by Raman scattering and a peak of the energy level was less than other type SiC films, From these results, the grown poly 3C-SiC thin film is very good crystalline quality, surface like mirror, and low defect and strain. Therefore, the polycrystalline 3C-SiC is suitable for harsh environment MEMS (Micro-Electro-Mechanical-Systems) applications.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1313-1314
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• 2006

The polycrystalline 3C-SiC thin films heteroepitaxially grown by LPCVD method using single precursor 1,3-disilabutane at $850^{\circ}C$. The crystallinity of the 3C-SiC thin film was analyzed by XRD and FT-IR. Residual strain was investigated by Raman scattering. The surface morphology was also observed by AFM and voids or dislocations between SiC and $SiO_2$ were measured by SEM. The grown poly 3C-SiC thin film is very good crystalline quality, surface like mirror, and low defect and strain. Therefore, the polycrystalline 3C-SiC is suitable for harsh environment MEMS applications.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.3
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• pp.261-264
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• 2005

The 90 nm gate pattern technology have been virtualized by employing the hard mask and the planarization of fate poly silicon. We fabricated 70nm poly-Si on $200 nm-SiO_2/p-Si(100)$ substrates using low pressure chemical vapor deposition (LPCVD) to investigate roughness evolution by varying rapid annealing temperatures. The samples were annealed at the temperatures of $700^{\circ}C\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The surface image and the surface roughness were measured by a field emission scanning electron microscopy (FESEM) and an atomic force microscopy (AFM), respectively. The poly silicon surface became more rough as temperature increased due to surface agglomeration. The optimum conditions of poly silicon planarization were achieved by annealed at $700^{\circ}C$ for 40 seconds.

• Electrical & Electronic Materials
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• v.10 no.8
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• pp.794-799
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• 1997

Poly-Si films have been prepared by solid phase crystallization of LPCVD(low-pressure CVD) amorphous silicon. The crystallinity of poly-Si films has been derived from UV reflectance spectrum and lies in the range between 70% and 80% . From XRD measurement the peak at 28.2$^{\circ}$from (111) plane is dominantly detected in the SPC poly-Si films, The average grain size of poly-Si film is determined by the image of SEM and varies from 4000 $\AA$ to 8000$\AA$. The electrical conductivity of as-deposited amorphous silicon film is about 2.5$\times$10$^{-7}$ ($\Omega$.cm)$^{-1}$ , and 3~4$\times$10$^{-6}$ ($\Omega$.cm)$^{-1}$ of room temperature conductivity is the SPC poly-Si films. The conductivity activation energies are 0.5~0.6 eV or the 500$\AA$-thick poly-Si films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.11a
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• pp.55-59
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• 1993

In this study, we developed new process for doping poly-Si film. Sb(antimony) thin film was used as doping source. Sb was evaporated on poly-Si film deposited by LPCVD fallowed by annealing. We investigate sheet resistance variation with annealing temperature and time. Finally we adapted this process to poly-Si TFT fabrication.