• 제목/요약/키워드: Junction properties

검색결과 370건 처리시간 0.022초

Fabrication of Organic-Inorganic Nanohybrid Semiconductors for Flexible Electronic Device

  • 한규석;정희찬;권덕현;성명모
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.114-114
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    • 2011
  • We report a high-performance and air-stable flexible and invisible semiconductor which can be substitute for the n-type organic semiconductors. N-type organic-inorganic nanohybrid superlattices were developed for active semiconducting channel layers of thin film transistors at low temperature of $150^{\circ}C$ by using molecular layer deposition with atomic layer deposition. In these nanohybrid superlattices, self-assembled organic layers (SAOLs) offer structural flexibility, whereas ZnO inorganic layers provide the potential for semiconducting properties, and thermal and mechanical stability. The prepared SAOLs-ZnO nanohybrid thin films exhibited good flexibility, transparent in the visible range, and excellent field effect mobility (> 7cm2/$V{\cdot}s$) under low voltage operation (from -1 to 3V). The nanohybrid semiconductor is also compatible with pentacene in p-n junction diodes.

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다중종자결정성장법으로 제조한 YBCO 초전도체의 미세조직과 자기적 성질에 관한 연구 (A study on the microstructures and magnetic properties of the multi-seeded melt growth processed YBCO superconductors)

  • 김호진;주진호;홍계원;김찬중
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 춘계학술대회 논문집 초전도 자성체
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    • pp.29-33
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    • 2002
  • 종자결정성장법은 단결정형 YBCO 초전도체를 제조하기에 매우 유용한 방법이다. 이 방법은 YBCO 성형체 위에 Sm123나 Nd123 종자를 올려놓고 용융 열처리하여 초전도 결정을 특정한 방위로 성장하게 하는 방법이다. 그러나 이 공정의 단점은 초전도체의 결정성장속도가 매우 느리기 때문에 전체공정시간이 길다는 것이다. 이를 개선하고자 본 연구에서는 성형체 위에 같은 결정방위를 갖는 여러 개의 종자들을 동시에 올려 놓고 열처리하여 단결정형 초전도체의 제조시간을 단축하고자 하였다. 이 공정을 다중종자결정성법이라 명명하였으며, 이 공정의 적용으로 공정시간을 상당히 단축할 수 있음을 증명하였다. 본 연구에서는 초전도체의 결정 성장과정, 종자의 갯수와 공정시간의 관계, 종자에서 생성, 성장된 결정들이 만드는 결정입계특성 동에 대해 논의하였다.

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유기태양전지 응용을 위한 원자층 증착 방식 제작의 알루미늄이 도핑 된 ZnO의 전기적, 구조적 특징 (Structural and Electrical Properties of Aluminum Doped ZnO Electrodes Prepared by Atomic Layer Deposition for Application in Organic Solar Cells)

  • 서인준;류상욱
    • 반도체디스플레이기술학회지
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    • 제13권2호
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    • pp.1-5
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    • 2014
  • Transparent and conducting aluminum-doped ZnO electrodes were fabricated by atomic layer deposition methods. The electrode showed the lowest resistivity of $5.73{\times}10^{-4}{\Omega}cm$ at a 2.5% cyclic layer deposition ratio of Trimethyl-aluminum and Diethyl-zinc chemicals. The electrodes showed minimum resistivity when deposited at a temperature of $225^{\circ}C$. The electrode also showed optical transmittance of about 92% at 300 nm. An organic solar cell made with a 300-nm-thick aluminum-doped ZnO electrode exhibited 2.0% power conversion efficiency.

Negative Dynamic Resistance and RF Amplification in Magnetic Tunnel Junctions

  • Tomita, Hiroyuki;Maehara, Hiroki;Nozaki, Takayuki;Suzuki, Yoshishige
    • Journal of Magnetics
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    • 제16권2호
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    • pp.140-144
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    • 2011
  • We report on a numerical calculation study of two new functional properties in magnetic tunnel junctions (MTJs), negative dynamic resistance and RF amplification. The magnetic dynamics in a conventional CoFeB/MgO/CoFeB MTJ with in-plane magnetization was investigated using a macro-spin model simulation. To examine the influence of thermal fluctuations, random external magnetic fields were also included. Using a voltage controlled bias circuit, the negative dynamic resistance was obtained from time averaged I-V characteristics at both 0 K and 300 K under appropriate external magnetic fields and bias voltages. Using this negative dynamic resistance property, we demonstrated RF amplification with a 100 MHz high frequency signal. Sizable RF amplification gain was observed without thermal fluctuation. However, at 300 K, the RF signal was not amplified because low frequency magnetization dynamics were dominant.

PNP 게이트를 가지는 폴리 실리콘 박막 트랜지스터의 전기적 특성 (Electrical characteristics of polysilicon thin film transistors with PNP gate)

  • 민병혁;박철민;한민구
    • 전자공학회논문지A
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    • 제33A권3호
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    • pp.96-106
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    • 1996
  • One of the major problems for poly-Si TFTs is the large off state leakage current. LDD (lightly doped drain) and offset gated structures have been employed in order to reduce the leakage current. However, these structures also redcue the oN current significantly due to the extra series resistance caussed by the LDD or offset region. It is desirable to have a device which would have the properties of the offset gated structure in the OFF state, while behaving like a fully gated device in the oN state. Therefore, we propose a new thin film transistor with pnp junction gate which reduce the leakage curretn during the OFF state without sacrificing the ON current during the ON state.

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Polyimide 터널 장벽을 이용한 Au/polyimide/유기 단분자막/Pb 구조에서 비탄성 전자 터널링에 관한 연구 (Inelastic Electron Tunneling in Au/polyimide/monolayer Organic Film/Pb Structures using a Polyimide Barrier)

  • 이호식;이원재;장경욱;최명규;이성일;김태완;;이준웅
    • 한국전기전자재료학회논문지
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    • 제17권2호
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    • pp.196-200
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    • 2004
  • Using polyimide Langmuir-Blodgett(LB) films as a tunneling harrier, we fabricated Au/Polyimide/1-layer arachidic acid/Pb structure in order to investigate electron transport properties through a junction. It was found that 9-layer polyimide LB films function as a good tunneling harrier in a study of current-voltage(I-V) chararteristics. And several peaks originating in the vibrational modes of the constituent molecules of 1-layer arachidic acid LB films were clearly observed in d$^2$V/dI$^2$- V corves.

Electrical Characteristics of CMOS Circuit Due to Channel Region Parameters in LDMOSFET

  • Kim, Nam-Soo;Cui, Zhi-Yuan;Lee, Hyung-Gyoo;Kim, Kyoung-Won
    • Transactions on Electrical and Electronic Materials
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    • 제7권3호
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    • pp.99-102
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    • 2006
  • The electrical characteristics of CMOS inverter with LDMOSFET are studied for high power and digital circuit application by using two dimensional MEDICI simulator. The simulation is done in terms of voltage transfer characteristic and on-off switching properties of CMOS inverter with variation of channel length and channel doping levels. The channel which surrounds a junction-type source in LDMOSFET is considered to be an important parameter to decide a circuit operation of CMOS inverter. The digital logic levels of input voltage show to increase with increase of n-channel length and doping levels while the logic output levels show to the almost constant.

파동접근법을 이용한 분기된 배관계의 진동 및 파워흐름해석 (Vibraiton and Power Flow Analysis for the Branched Piping System by Wave Approach)

  • 구경회;박윤식
    • 대한기계학회논문집A
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    • 제20권4호
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    • pp.1225-1232
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    • 1996
  • In this paper the vibration and power flow analysis for the branched piping system conveying fluid are performed by wave approach. The uniform straight pipe element conveying fluid is formulated using the dynamic stiffness matrix by wave approach. The branched piping system conveying fluid can be easily formulated with considering of simple assumptions of displacements at the junction and continuity conditions of the pipe internal flow. The dynamic stiffness matrix for each uniform straight pipe element can be assembled by using the global assembly technique using in conventional finite element method. The computational method proposed in this paper can easily calculate the forced responses and power flow of the branched piping system conveying fluid regardless of finite element size and modal properties.

Capping Material & External Field Intensity에 따른 자기 저항 특성 연구 (Magnetic Properties of MTJ by Capping Material & External Field Intensity)

  • 이계남;장인우;박영진;박상용;이재형;전경인;신경호
    • 한국자기학회:학술대회 개요집
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    • 한국자기학회 2002년도 동계연구발표회 논문개요집
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    • pp.50-51
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    • 2002
  • 최근 실온에서 약 40% 이상의 높은 자기저항(magnetoresistance, MR)을 나타내는 자기 터널 접합(magnetic tunnel junction, MTJ)이 보고되면서 비휘발성 자기메모리로의 응용을 눈앞에 두고 있다.[1]. 이에 본 실험에서는 Substrate / Ta (base electrode) / NiFe / PtMn (AF pinning layer) / CoFe (pinned) / Ru / CoFe (fixed) / Al-O/ CoFe (free) / NiFe (free) / Ta & Ru (Capping Layer)과 같은 MTJ 증착 구조를 사용하여, MTJ의 보다 향상된 특성을 확보하기 위한 노력으로서 Al-O 두께, 어닐링 조건(Field Intensity & Sequence)변화 등을 시도하였다. (중략)

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Tunneling Magnetoresistance: Physics and Applications for Magnetic Random Access Memory

  • Park, Stuart in;M. Samant;D. Monsma;L. Thomas;P. Rice;R. Scheuerlein;D. Abraham;S. Brown;J. Bucchigano
    • 한국자기학회:학술대회 개요집
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    • 한국자기학회 2000년도 International Symposium on Magnetics The 2000 Fall Conference
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    • pp.5-32
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    • 2000
  • MRAM, High performance MRAM using MTJS demostrated, fully integrated MTJ MRAM with CMOS circuits, write time ~2.3 nsec; read time ~3 nsec, Thermally stable up to ~350 C, Switching field distibution controlled by size & shape. Magnetic Tunnel Junction Properties, Magnetoresistance: ~50% at room temperature, enhanced by thermal treatment, Negative and Positive MR by interface modification, Spin Polarization: >55% at 0.25K, Insensitive ot FM composition, Resistance $\times$ Area product, ranging from ~20 to 10$^{9}$ $\Omega$(${\mu}{\textrm}{m}$)$^{2}$, Spin valve transistor, Tunnel injected spin polarization for "hot" electrons, Decrease of MTJMR at high bias originates from anode.

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