• ETRI Journal
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• 제30권3호
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• pp.480-482
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• 2008

A novel InGaAsP/InP buried-ridge waveguide laser diode structure is proposed and demonstrated for use as a single-mode laser. The lateral mode of the proposed device can be controlled by adjusting the composition and thickness of the InGaAsP layer grown over the active region. Stable single-mode operation without kinks or beam-steering is achieved successfully with lateral and transverse in the junction plane even for the device with the ridge width of 9 ${\mu}m$ up to an injection current of 500 mA.

• 전기학회논문지P
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• 제60권4호
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• pp.206-213
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• 2011

Line sleeves, which used to connect ACSR cables when transmission lines were constructing, sometimes cause power transmission failure due to deterioration and corrosion. Therefore, power transmission line should be inspected regularly to prevent national disaster. Current inspection tool detects insertion length of transmission line on line sleeves, the inspection tool includes enormous error by operator. Moreover, the system is not controlled remotely, negligent accident would be caused while inspecting. To deal with those problems, KEPCO reviewed several ways to inspect line sleeves and proposes new method to inspect line sleeve by measuring magnetic flex which penetrate junction of steel and aluminum sleeve. The developed inspection tool is reliable enough to detect eccentric sleeves. Also, the developed inspection device was applied on actual transmission line and verified its effectiveness.

• Journal of Electrical Engineering and Technology
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• 제4권2호
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• pp.287-291
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• 2009

In this paper, an optical switch/modulator is designed and its light propagating characteristics analyzed using a simplified BPM. The distinctive feature of this switch/modulator is that all its waveguide branches are designed as single-mode. The principle of the device is based on the coupled mode theory in the Y-junction interconnecting waveguide. In spite of the fact all waveguides are designed as single-mode, by adjusting the interconnecting waveguide length'of the device the same characteristics as existing up to date devices are obtainable. Numerical results show that the switching characteristics periodically depend upon an interconnecting waveguide length with a spatial of about $150^{{\mu}m}$ in the $Ti:LiNbO_3$ step index waveguide. The design concept would therefore be utilized effectively in fabricating a monolithic high density optical integrated circuit.

• 한국전기전자재료학회논문지
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• 제30권3호
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• pp.148-151
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• 2017

This research concerns field rings for 3.3kV planar gate power insulated-gate bipolar transistors (IGBTs). We design an optimal field ring for a 3.3kV power IGBT and analyze its electrical characteristics according to field ring parameters. Based on this background, we obtained 3.3kV high breakdown voltage and a 2.9V on state voltage drop. To obtain high breakdown voltage, we confirmed that the field ring count was 23, and we obtained optimal parameters. The gap distance between field rings $13{\mu}m$ and the field ring width was $5{\mu}m$. This design technology will be adapted to field stop IGBTs and super junction IGBTs. The thyristor device for a power conversion switch will be replaced with a super high voltage power IGBT.

• 한국전기전자재료학회논문지
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• 제26권10호
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• pp.713-719
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• 2013

Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have optimal designed planar and trench gate power MOSFET for high breakdown voltage and low on resistance. When we have designed $6,580{\mu}m{\times}5,680{\mu}m$ of chip size and 20 A current, on resistance of trench gate power MOSFET was low than planar gate power MOSFET. The on state voltage of trench gate power MOSFET was improved from 4.35 V to 3.7 V. At the same time, we have designed unified field limit ring for trench gate power MOFET. It is Junction Termination Edge type. As a result, we have obtained chip shrink effect and low on resistance because conventional field limit ring was convert to unify.

• Journal of Electrical Engineering and Technology
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• 제9권6호
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• pp.2079-2088
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• 2014

In this paper, we propose new physically based threshold voltage models for short channel Surrounding Gate Silicon Nanowire Transistor with two different geometries. The model explores the impact of various device parameters like silicon film thickness, film height, film width, gate oxide thickness, and drain bias on the threshold voltage behavior of a cylindrical surrounding gate and rectangular surrounding gate nanowire MOSFET. Threshold voltage roll-off and DIBL characteristics of these devices are also studied. Proposed models are clearly validated by comparing the simulations with the TCAD simulation for a wide range of device geometries.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 1999년도 춘계종합학술대회
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• pp.330-334
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• 1999

This paper presents a new transient voltage blocking device (TBD) for commucation facilities with low power and high frequency bandwidth. Conventional protection devices have some problems such as low frequency bandwidth, low energy capacity and high remnant voltage. In order to improve these limitations, the new TBD, which consists of a gas tube, avalanche diodes and junction type field effect transistors (JFETs), was designed and fabricated JFETs were used as an active non-linear element and a high speed switching diode with low capacitance limits high current. Therefore the avalanche diodes with low energy capacity are protected from the high current, and the TBD has a very small input capacitance. From the performance test using surge generator, which can produce 1.2/50${\mu}\textrm{s}$ 4.2 k$V_{max}$, 8/20${\mu}\textrm{s}$ 2.1 kA$\sub$max/, it is confirmed that the proposed TBD has an excellent protection performance in tight clamping voltage and limiting current characteristics.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.363-367
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• 1988

A simple analytical model for the lateral channel electric field in gate - offset structured Lightly Doped Drain MOSFET has been developed. The model's results agree well with two dimensional device simulations. Due to its simplicity, our model gives a better understanding of the mechanisms involved in reducing the electric field in the LDD MOSFET. The model shows clearly the dependencies of the lateral channel electric field as function of drain and gate bias conditions and process, design parameters. Advantages of analytical model over costly 2-D device simulations is to identify the effects of various parameters, such as oxide thickness, junction depth, gate / drain bias, the length and doping concentration of the lightly doped region, on the peak electric field that causes hot - electron phenomena, individually. We are able to find the optimum doping concentration of LDD minimizing the peak electric field and hot - electron effects.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1042-1045
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• 2002

The scaling of device dimension and supply voltage with high performance and reliability has been the main subject in the evolution of VLSI technology, The MOSFET structures become susceptible to high field related reliability problems such as hot-electron induced device degradation and dielectric breakdown. HLDBD(HLD Buffered Deposition) is used to decrease junction electric field in this paper. Also we compared the hot carrier characteristics of HLDBD and conventional.

• 전기전자학회논문지
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• 제10권2호통권19호
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• pp.141-148
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• 2006

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low signal swing range, maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD Phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, The high speed I/O interface circuit with the low triggered ESD protection device in one-chip was designed.