• Journal of the Korean Institute of Telematics and Electronics
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• v.13 no.2
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• pp.23-27
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• 1976

$Si{\cdot}SnO_{2}$ heterojunction was prepared by oxidzing at oxygen atmosphere $SnO_{2-X}$ Which made by Flith evaporation of $SnO_{2}$ powder on III surface of p and n type Si single crystals. The energy band Profile of $Si{\cdot}SnO_{2}$ heterojunction was depicted from its physical properties. This heterojunction was very good rectifying junction, very sensitive in spectral response of Photovoltage at from 400nm to 1200nm, and -10$^{18}$sec of time contant. From above properties, this heterojunction was found ps good high speed photovoltaic device and solar cell.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.109-114
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• 2013

Power MOSFET (metal-oxide semiconductor field-effect transistor) are widely used in power electronics applications, such as BLDC (Brushless Direct Current) motor and power module, etc. For the conventional power MOSFET device structure, there exists a tradeoff relationship between specific on-state resistance and breakdown voltage. In order to overcome the tradeoff relationship, a non-uniform super-junction (SJ) trench MOSFET (TMOSFET) structure for an optimal design is proposed in this paper. It is required that the specific on-resistance of non-uniform SJ TMOSFET is less than that of uniform SJ TMOSFET under the same breakdown voltage. The idea with a linearly graded doping profile is proposed to achieve a much better electric field distribution in the drift region. The structure modelling of a unit cell, the characteristic analyses for doping density, and potential distribution are simulated by using of the SILVACO TCAD 2D device simulator, Atlas. As a result, the non-uniform SJ TMOSFET shows the better performance than the uniform SJ TMOSFET in the specific on-resistance at the class of 100V.

• Journal of the Semiconductor & Display Technology
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• v.13 no.3
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• pp.45-50
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• 2014

In this paper, we propose a super-junction MOSFET (SJ MOSFET) fabricated through a simple pillar forming process by varying the Si epilayer thickness and doping concentration of pillars using SILVACO TCAD simulation. The design of the SJ MOSFET structure is presented, and the doping concentration of pillar, breakdown voltage ($V_{BR}$) and drain current are analyzed. The device performance of conventional Si planar metal-oxide semiconductor field-effect transistor(MOSFET), Si SJ MOSFET, and SiGe SJ MOSFET was investigated. The p- and n-pillars in Si SJ MOSFET suppressed the punch-through effect caused by drain bias. This lead to the higher $V_{BR}$ and reduced on resistance of Si SJ MOSFET. An increase in the thickness of Si epilayer and decrease in the former is most effective than the latter. The implementation of SiGe epilayer to SJ MOSFET resulted in the improvement of $V_{BR}$ as well as drain current in saturation region, when compared to Si SJ MOSFET. Such a superior device performance of SiGe SJ MOSFET could be associated with smaller bandgap of SiGe which facilitated the drift of carriers through lower built-in potential barrier.

• Journal of the Korean Vacuum Society
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• v.13 no.1
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• pp.14-21
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• 2004

It is essential to increase the switching speed of power devices to reduce the energy loss because high frequency is commonly used in power device operation these days. In this work electron irradiation has been conducted to reduce the lifetime of minority carriers and thereby to increase the switching speed of a$p^+- n^-$ junction diode. Effects of electron irradiation on the electrical properties of the diode are reported The switching speed is effectively increased. Also the junction leakages and the forward voltage drop which are anticipated to increase are found to be negligible in the $p^+- n^-$ junction diodes irradiated with the optimum energy and dose. The analysis results of DLTS and C-V profiling indicate that the defects induced by electron irradiation in the silicon substrate are donor-like ones which have the energy levels of 0.284 eV and 0.483 eV. Considering all the experimental results in this study, it might be concluded that electron irradiation is a very useful technique in improving the switching speed and thereby reducing the energy loss of $p^+- n^-$ junction diode power devices.

• 한국초전도학회:학술대회논문집
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• v.9
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• pp.185-188
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• 1999

Biepitaxial Y$_1Ba_2Cu_3O_{7-x}$ (YBCO) and La$_{0.2}Sr_{0.8}MnO_3$ (LSMO) thin films have been prepared on SrTiO$_3$ buffer layer and MgO seed layer grown on Al$_2O_3$(11${\bar{2}}$0)substrates by dc-sputtering with hollow cylindrical targets, respectively. We charaterized Josephson properties and significantly large magnetoresistance in YBCO and LSMO films with 45$^{\circ}$ grain boundary junction, respectively. The observed working voltage (I$_cR_n$) at 77 K in grain boundary junction was below 10${\mu}$V, which is typical I$_cR_n$ value of single biepitaxial Josephson junction. The field magnetoresistance ratio (MR) of LSMO grain boundary juncoon at 77K was enhanced to 13%, which it was significant MR value with high magnetic field sensitivity at a low field of 250 Oe. These results indicate that inserting the insulating layer instead of the grain boundary layer with metallic phase can be possible to apply a new SIS Josephson junction and a novel magnetic device using spin-polarized tunneling junction.

• Applied Science and Convergence Technology
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• v.24 no.3
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• pp.53-59
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• 2015

The field-effect transistors (FETs) with a graphene-based p-n junction channel were fabricated using the patterned self-assembled monolayers (SAMs). The self-assembled 3-aminopropyltriethoxysilane (APTES) monolayer deposited on $SiO_2$/Si substrate was patterned by hydrogen plasma using selective coating poly-methylmethacrylate (PMMA) as mask. The APTES-SAMS on the $SiO_2$ surface were patterned using selective coating of PMMA. The APTES-SAMs of the region uncovered with PMMA was removed by hydrogen plasma. The graphene synthesized by thermal chemical vapor deposition was transferred onto the patterned APTES-SAM/$SiO_2$ substrate. Both p-type and n-type graphene on the patterned SAM/$SiO_2$ substrate were fabricated. The graphene-based p-n junction was studied using Raman spectroscopy and X-ray photoelectron spectroscopy. To implement low voltage operation device, via ionic liquid ($BmimPF_6$) gate dielectric material, graphene-based p-n junction field effect transistors was fabricated, showing two significant separated Dirac points as a signature for formation of a p-n junction in the graphene channel.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.1
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• pp.59-65
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• 2012

A study on the electrical characteristic analysis of solar cell diodes under experimental conditions of varying temperature and frequency has been conducted. From the current-voltage (I-V) measurements, at the room temperature, we obtained the ideality factor (n) for Space Charge Region (SCR) and Quasi-Neutral Region (QNR) of 3.02 and 1.76, respectively. Characteristics showed that the value of n (at SCR) decreases with rising temperature and n (at QNR) increases with the same conditions. These are due to not only the sharply increased SCR current flow but the activated carrier recombination in the bulk region caused by defects such as contamination, dangling bonds. In addition, from the I-V measurements implemented to confirm the junction uniformity of cells, the average current dispersion was 40.87% and 10.59% at the region of SCR and QNR, respectively. These phenomena were caused by the pyramidal textured junction structure formed to improve the light absorption on the device's front surface, and these affect to the total diode current flow. These defect and textured junction structure will be causes that solar cell diodes have non-ideal electrical characteristics compared with general p-n junction diodes. Also, through the capacitance-voltage (C-V) measurements under the frequency of 180 kHz, we confirmed that the value of built-in potential is 0.63 V.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.87.2-87.2
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• 2015

Transparent conductors are commonly used in photoelectric devices, where the electric energy converts to light energy or vice versa. Energy consumption devices, such as LEDs, Displays, Lighting devices use the electrical energy to generate light by carrier recombination. Meanwhile, solar cell is the only device to generate electric energy from the incident photon. Most photoelectric devices require a transparent electrode to pass the light in or out from a device. Beyond the passive role, transparent conductors can be employed to form Schottky junction or heterojunction to establish a rectifying current flow. Transparent conductor-embedded heterojunction device provides significant advantages of transparent electrode formation, no need for intentional doping process, and enhanced light-reactive surface area. Herein, we present versatile applications of transparent conductors, such as NiO, ZnO, ITO in photoelectric devices of solar cells and photodetectors for high-performing UV or IR detection. Moreover, we also introduce the growth of transparent ITO nanowires by sputtering methods for large scale application.

• Clean Technology
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• v.28 no.3
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• pp.227-231
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• 2022

The demand for high-voltage power devices is rising in various industries, but especially in the transportation industry due to autonomous driving and electric vehicles. IGBT module parts of 3.3 kV or more are used in the power propulsion control device of electric vehicles, and the procurement of these parts for new construction and maintenance is increasing every year. In addition, research to optimize high-voltage IGBT parts is urgently required to overcome their very high technology entry barrier. For the development of high-voltage IGBT devices over 3.3 kV, the resistivity range setting of the wafer and the optimal conditions for major unit processes are important variables. Among the manufacturing processes to secure the optimal junction depth, the optimization of the diffusion process, which is one step of the unit process, was examined. In the diffusion process, the type of gas injected, the injection time, and the injection temperature are the main variables. In this study, the range of wafer resistance (Ω cm) was set for the development of high voltage IGBT devices through unit process simulation. Additionally, the well drive in (WDR) condition optimization of the diffusion process according to temperature was studied. The junction depth was 7.4 to7.5 ㎛ for a ring pattern width of 23.5 to25.87 ㎛, which can be optimized for supporting 3.3 kV high voltage power devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.189-189
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• 2012

Lead sulfide (PbS) nanocrystal quantum dots (NQDs) are promising materials for various optoelectronic devices, especially solar cells, because of their tunability of the optical band-gap controlled by adjusting the diameter of NQDs. PbS is a IV-VI semiconductor enabling infrared-absorption and it can be synthesized using solution process methods. A wide choice of the diameter of PbS NQDs is also a benefit to achieve the quantum confinement regime due to its large Bohr exciton radius (20 nm). To exploit these desirable properties, many research groups have intensively studied to apply for the photovoltaic devices. There are several essential requirements to fabricate the efficient NQDs-based solar cell. First of all, highly confined PbS QDs should be synthesized resulting in a narrow peak with a small full width-half maximum value at the first exciton transition observed in UV-Vis absorbance and photoluminescence spectra. In other words, the size-uniformity of NQDs ought to secure under 5%. Second, PbS NQDs should be assembled carefully in order to enhance the electronic coupling between adjacent NQDs by controlling the inter-QDs distance. Finally, appropriate structure for the photovoltaic device is the key issue to extract the photo-generated carriers from light-absorbing layer in solar cell. In this step, workfunction and Fermi energy difference could be precisely considered for Schottky and hetero junction device, respectively. In this presentation, we introduce the strategy to obtain high performance solar cell fabricated using PbS NQDs below the size of the Bohr radius. The PbS NQDs with various diameters were synthesized using methods established by Hines with a few modifications. PbS NQDs solids were assembled using layer-by-layer spin-coating method. Subsequent ligand-exchange was carried out using 1,2-ethanedithiol (EDT) to reduce inter-NQDs distance. Finally, Schottky junction solar cells were fabricated on ITO-coated glass and 150 nm-thick Al was deposited on the top of PbS NQDs solids as a top electrode using thermal evaporation technique. To evaluate the solar cell performance, current-voltage (I-V) measurement were performed under AM 1.5G solar spectrum at 1 sun intensity. As a result, we could achieve the power conversion efficiency of 3.33% at Schottky junction solar cell. This result indicates that high performance solar cell is successfully fabricated by optimizing the all steps as mentioned above in this work.