• Journal of the Korea Institute of Information Security & Cryptology
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• v.17 no.6
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• pp.121-130
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• 2007

In this paper, we propose a reversible watermarking scheme in the JPEG compression domain. The reversible watermarking is useful to authenticate the content without the quality loss because it preserves the original content when embed the watermark information. In the internet, for the purpose to save the storage space and improve the efficiency of communication, digital image is usually compressed by JPEG or GIF. Therefore, it is necessary to develop a reversible watermarking in the JPEG compression domain. When the watermark is embedded, the lossless compression was used and the original image is recovered during the watermark extracting process. The test results show that PSNRs are distributed from 38dB to 42dB and the payload is from 2.5Kbits to 3.4Kbits where the QF is 75. Where the QF of the Lena image is varied from 10 to 99, the PSNR is directly proportional to the QF and the payload is around $1.6{\sim}2.8Kbits$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1C
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• pp.35-44
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• 2004

In this paper, we design an efficient VLSI architecture of entropy coding algorithm in JPEG2000. Entropy coder is a context-based binary arithmetic encoder, and composed of a Context Extractor(CE) and an Arithmetic Coder(AC). We speed-up CE by skipping no-operation bits in coding passes, and AC is to be performed based on MQ coder. Because of using Qe value associated with each allowed context and probability estimation, MQ coder is a multiplication free coder that reduces computation loads and makes simple the structure of arithmetic coder. We have developed and synthesized the VHDL models of CE and AC pairs using Xilinx FPGA technology. The proposed architecture operates up to 30MHz.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.5
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• pp.942-946
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• 2009

A scan order converter has to be placed before the JPEG encoder to provide $8{\times}8$ blocks from the pixels in raster scan order. Recently a hardware architecture has been proposed to implement a scan converter based on the single line memory. Since both read and write accesses happen at each cycle, however, the largest part of the entire power budget is occupied by the SRAM itself. In this paper, the data packing and unpacking procedure is inserted in the processing chain, such that the access frequency to the SRAM is reduced to 1/8 by adopting a packed larger data unit. The simulation results show that the resultant power consumption is reduced down to 16% for the SXGA resolution.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.9C
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• pp.869-875
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• 2006

Nowadays JPEG encoder uses block based DCT and quantization to compress the size of still image. JPEG encoding method performs better compression efficiency than the other still image encoding method. However, when encoding a still image at low bit-rate, high frequency coefficients could be lost because of the coarse quantization so the blocking artifacts occur. In this paper, we propose the method of eliminating the blocking artifacts which occur when the still image is encoded by JPEG at a high compression rate. The principle of proposed algorithm is that the eliminating the blocking artifacts, which occur in the boundary of blocks, in DCT domain with $4{\times}4$ block-based method. First of all, observe the blocking artifacts with $4{\times}4$ block in DCT domain. Then eliminate the blocking effects using effective filtering method that is $4{\times}4$ block-based. Experimental results have clearly shown that our algorithm presents substantially higher quality in subjective and objective point of view than the other algorithms.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1803-1806
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• 2002

This paper describes an effective technique for lossless inter-frame video coding sequences based on a JPEG2000 CODEC. This technique has diminished the compression rate for lossless video coding. In this proposed method, firstly a predicted image for an in- put image is generated by motion estimation(ME), and then a difference image between the input image and the predicted image is calculated, and finally the difference image becomes an input image to a JPEG2000 encoder for lossless coding. Simulation results show the effectiveness of this method.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.2
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• pp.100-107
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• 2011

As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements(PEs) and operates on a 3-stage pipelining. Experimental results for the JPEG encoding algorithm indicate that the proposed parallel processor outperforms conventional parallel processors in terms of performance and energy efficiency. In addition, the proposed parallel processor architecture was developed and verified with verilog HDL and a FPGA prototype system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3C
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• pp.297-305
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• 2007

In the paper, a Motion JPEG2000 coder which has been set as the standard for image compression by the Digital Cinema Initiatives (DCI), an organization composed of major movie studios was implemented into a target FPGA. The DWT (Discrete Wavelet Transform) based on lifting and the Tier 1 of EBCOT (Embedded Block Coding with Optimized Truncation) which are major functional modules of the JPEG2000 were setup with dedicated hardware. The Tier 2 process was implemented in software. For digital cinema the tile-size was set to support $1024\times1024$ pixels. To ensure the real-time operations, three entropy encoders were used. When Verilog-HDL was used for hardware, resources of 32,470 LEs in Altera's Stratix EP1S80 were used, and the hardware worked stably at the frequency of 150Mhz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.86-94
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• 2007

The NoC (network-on-chip) approach is a promising solution to the increasing complexity of on-chip communication problems because of its high scalability. But, NoC applications generally consume a lot of power, because they require a large design space to accommodate many parallel IPs and network communication channels. It is not easy to analyze the power consumption of NoC applications with conventional simulation methods using simple power models. In addition, there are also many limitations in using sophisticated simulation models because they require long execution time and large efforts. In this paper, we apply a cycle-accurate energy measurement technique and tool to the FPGA prototypes, which are generally used to verify the correctness of SoC designs, as a practical indication of the power consumption of real NoC applications. An NoC-based JPEG encoder implementation is used as a case study to demonstrate the effectiveness of our approach.

• Journal of Broadcast Engineering
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• v.10 no.3
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• pp.436-450
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• 2005

In this paper we propose an integrated media format for a photo album including media resources and corresponding meta-data The main purpose of the integrated media is to be more reusable meta-data and to facilitate constructing a photo album from a large number of photo images as well. The proposed media format is based on MAF(multimedia Application Format) which is recently going on progress in MPEG standards. In this paper, we propose the integrated media consisting of JPEG data and content-based meta-data based on MPEG-7 MDS. We verified the usefulness of the proposed media through experiments with implementation of encoder and photo MAF player for the MAF-based media format.

• Journal of Broadcast Engineering
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• v.14 no.1
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• pp.93-98
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• 2009

While the Motion JPEG2000 has been considered as a unique encoder for digital cinema due to its high quality coding and large screen format, the realization of a digital cinema system and its service cost enormous fund and time. In this paper a digital cinema transmission system with PC and RTP protocol over the Internet is proposed, and showed how tiles of moving images are transmitted, decoded independently and combined to reconstruct and display at a large screen for digital cinema service. The simulation has been carried out for tiles of 128${\times}$128, 256${\times}$256, 512${\times}$512, and 1024${\times}$1024 pixels. In the experiment, two clients of PC’s received and decoded tiles of video and constructed whole size of moving images successfully. The PSNR’s of the video ranges 30dB to 40dB at compression rate of 160:1 and 30dB to 50dB at and below 16:1, respectively. The result showed a possibility for the reconstruction of video in multi-vision.