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NoC Energy Measurement and Analysis with a Cycle-accurate Energy Measurement Tool for Virtex-II FPGAs  

Lee, Hyung-Gyu (School of Electrical Engineering and Computer Sciences, Seoul National University)
Chang, Nae-Hyuck (School of Electrical Engineering and Computer Sciences, Seoul National University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.2, 2007 , pp. 86-94 More about this Journal
Abstract
The NoC (network-on-chip) approach is a promising solution to the increasing complexity of on-chip communication problems because of its high scalability. But, NoC applications generally consume a lot of power, because they require a large design space to accommodate many parallel IPs and network communication channels. It is not easy to analyze the power consumption of NoC applications with conventional simulation methods using simple power models. In addition, there are also many limitations in using sophisticated simulation models because they require long execution time and large efforts. In this paper, we apply a cycle-accurate energy measurement technique and tool to the FPGA prototypes, which are generally used to verify the correctness of SoC designs, as a practical indication of the power consumption of real NoC applications. An NoC-based JPEG encoder implementation is used as a case study to demonstrate the effectiveness of our approach.
Keywords
FPGA prototype; Power analysis; JPEG encoder; NoC; SoC;
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