• Journal of Power Electronics
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• v.13 no.2
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• pp.223-231
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• 2013

A modular three-phase multilevel inverter especially suitable for electrical drive applications has been previously presented. This topology is based on series connection of power cells in which each cell comprised of two inverter legs in series. In this paper, in order to generate the maximum number of voltage levels with reduced number of switches, three algorithms are proposed for determination of the magnitudes of dc voltage sources. In addition, a new hybrid multilevel inverter is proposed that is composed of series connection of the previously presented multilevel inverter and some H-bridges. The proposed topology has been compared with some other presented multilevel inverters. The performance of the proposed multilevel inverter has been verified by simulation and experimental results of a single-phase 39-level multilevel inverter.

• Journal of Power Electronics
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• v.13 no.2
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• pp.250-255
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• 2013

This paper proposes an optimal current distribution method of dual-rotor brushless DC machines (DR-BLDCMs) which have inner and outer surface-mounted permanent-magnet rotors. The DR-BLDCM has high power density and high torque density compare to the conventional single rotor BLDCM. To drive the DR-BLDCM, dual 3-phase PWM inverters are required to excite the currents of a dual stator of the DR-BLDCM and an optimal current distribution algorithm is also needed to enhance the system efficiency. In this paper, the copper loss and the switching loss of a DR-BLDCM drive system are analyzed according to the motor parameters and the switching frequency. Moreover, the optimal current distribution method is proposed to minimize the total electrical loss. The validity of the proposed method was verified through several experiments.

• Journal of Power Electronics
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• v.13 no.2
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• pp.243-249
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• 2013

This paper presents a neutral-point voltage balancing method for three-level inverter systems using a time-offset estimation scheme. The neutral-point voltage is balanced by adding a time-offset to the turn-on time of the switches. If an inaccurate time-offset is added, the neutral-point deviation still remains. An accurate time-offset is obtained through the proposed time-offset estimation scheme. This method is implemented without additional hardware, complex calculations, or analysis. The effectiveness of the proposed method is verified by experiments.

• Journal of Power Electronics
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• v.13 no.2
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• pp.264-274
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• 2013

A new sensorless position estimation method for switched reluctance motor (SRM) drives is presented in this paper. This method uses the change of the slope of the phase inductance to detect the aligned position. Since the aligned positions for successive electrical cycle of each phase are apart by a fixed mechanical angle $45^{\circ}$ in the case of 12/8 SRM, the speed of the machine can be calculated to estimate the rotor position. Since no prior knowledge of motor parameters is required, the method is easy for implementation without adding any additional hardware or memory. In order to verify the validity of this technique, effects such as changes in the advanced angle and phase lacking faults are examined. In addition, an inductance threshold based sensorless starting scheme is also proposed. Experimental results demonstrate the validity of the proposed method.

• Journal of Power Electronics
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• v.13 no.2
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• pp.256-263
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• 2013

This paper presents an IHQRR (Integrated High Quality Rectifier Regulator) BIFRED (Boost Integrated Flyback Rectifier Energy Storage DC-DC) converter fed BLDC (Brushless DC) motor drive. A reduced sensor topology is derived by utilizing a BIFRED converter to operate in a dual DCM (Discontinuous Conduction Mode) thus utilizing a voltage follower approach for the PFC (Power Factor Correction) and voltage control. A new approach for speed control is proposed using a single voltage sensor. The speed of the BLDC motor drive is controlled by varying the DC link voltage of the front end converter. Moreover, fundamental frequency switching of the VSI's (Voltage Source Inverter) switches is used for the electronic commutation of the BLDC motor which reduces the switching losses in the VSI. The proposed drive is designed for a wide range of speed control with an improved power quality at the AC mains which falls within the recommended limits imposed by international power quality standards such as IEC 61000-3-2.

• Journal of Power Electronics
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• v.15 no.3
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• pp.602-609
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• 2015

In this paper, a zero current transition (ZCT) double-ended flyback converter is proposed. All of the switching elements act under soft switching conditions and the voltage stress of the main switches is limited to the input voltage due to the innate behavior of the double-ended flyback converter. Providing soft switching conditions and clamping the voltage stress improves the efficiency and electromagnetic compatibility (EMC). The Proposed converter is analyzed in detail and its operating modes are discussed in detail. Experimental results are presented to verify the theoretical predictions. Moreover, the conducted electromagnetic emissions of the proposed ZCT double-ended flyback converter are measured to show another merit of the proposed converter in addition to providing soft switching conditions. The measured electromagnetic interference (EMI) of the proposed converter demonstrates that its EMI is lower than the conventional double-ended flyback converter. Furthermore, two simple and cost effective EMI reduction methods are applied to satisfy the EMC standard.

• Journal of Power Electronics
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• v.15 no.3
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• pp.830-840
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• 2015

The H-bridge inverter is the fundamental power cell of the cascaded distribution static synchronous compensator (DSTATCOM). Thus, cell reliability is important to the compensation performance and stability of the overall system. The concept of the power electronics building block (PEBB) is an ideal solution for the power cell design. In this paper, an H-bridge inverter-based “plug and play” HPEBB is introduced into the main circuit and the controller to improve the compensation performance and reliability of the device. The section that discusses the main circuit primarily emphasizes the design of electrical parameters, physical structure, and thermal dissipation. The section that presents the controller part focuses on the principle of complex programmable logic device -based universal controller This section also analyzes typical reliability and anti-interference issues. The function and reliability of HPEBB are verified by experiments that are conducted on an HPEBB test-bed and on a 10 kV/± 10 Mvar DSTATCOM industrial prototype.

• Journal of Power Electronics
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• v.15 no.3
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• pp.644-651
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• 2015

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

• Journal of Power Electronics
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• v.15 no.3
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• pp.702-711
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• 2015

In this paper, an effective carrier-based modulation (CBM) strategy to reduce the switching losses for indirect matrix converters (IMCs) is presented. The discontinuous pulse width modulation method is applied to decrease the switching numbers in one carrier cycle, and an optimum offset voltage is selected to avoid commutations of the high output phase currents. By decreasing the switching numbers along with avoiding commutation of the high currents, the proposed CBM strategy significantly reduces the switching losses in IMCs. In addition, the proposed CBM strategy is independent of load conditions, such as load power and power factor, and it has good performance in terms of the input/output waveforms. Simulation and experimental results are provided to verify the effectiveness of the proposed CBM strategy.

• Journal of Power Electronics
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• v.15 no.3
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• pp.695-701
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• 2015

Uninterruptible Power Supplies (UPSs) can be largely divided into the passive-standby, line-interactive and double-conversion methods. This paper proposes a double-conversion UPS with a low cost and high performance. This single phase UPS uses a single-loop robust voltage controller and 1-switch voltage doubler strategy PFC. The proposed UPS is composed of a single phase PFC, a half-bridge inverter, a battery charger and a battery discharger. Finally, the validity of proposed UPS was verified by various experimental tests.