• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.9
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• pp.1615-1620
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• 2010

A thin film thermoelectric cooler for COB direct assembly was proposed and the COB cooler structure was modeled by electrical equivalent circuit by using SPICE model of thermoelectric devices. The embedded cooler attached between the die chip and metal plate can offer the possibility of thin film active cooling for the COB direct assembly. We proposed a driving method of TEC by using pulse width modulation technique. The optimum power to the TEC is simulated by using a SPICE model of thermoelectric device and passive components representing thermal resistance and capacitance. The measured and simulated results offer the possibility of thin film active cooling for the COB direct assembly.

• Proceedings of the KIEE Conference
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• 2005.07d
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• pp.3019-3021
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• 2005

In this paper we suggest a novel temperature detection method utilized in direct over-temperature protection circuit modeling. The suggested model detects temperature variation using Rds(on) characteristics of MOSFET, while the conventional methods are using extra devices such as a temperature sensor or an over-temperature detection transistor. The temperature-dependant MOSFET model is implemented using Spice ABM(Spice Analog Behavior Model). The direct over-temperature protection circuit was designed including it. We verified effectiveness of the temperature dependant Rds(on) model characteristics and performance of the direct over-temperature protection circuit on PSpice simulation

• Journal of the East Asian Society of Dietary Life
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• v.6 no.3
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• pp.393-401
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• 1996

This survey was carried out as part of a basic works to improve the extention of native chicken uses. A sample of 282 housewives living in the downtown area of Taegu city were examined using an original questionnaire about their awareness and uses of a native chicken. The results were as follows: The awareness for a chicken dish is significantly different according to the housewives' ages and many respondents evaluated the nutritive value of a native chicken. The housewives preferred chicken boiled plain, spice fried chicken and stewed chicken, in the order. But family members preferred chicken boiled plain, spice fried chicken and french fried chicken, in the order. The frequencies of chicken cooking and buying chicken dishes of the housewives were once permonth and they regarded a native chicken as one of traditional, health and natural foods. They appreciated the taste of a native chicken highly and recognized the price of a native chicken expensive. Also 52.5% of housewives could distinguish a native chicken from the others.

• Culinary science and hospitality research
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• v.5 no.1
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• pp.131-148
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• 1999

Cheju's local foods are various but Island being geographically surrounded by water, sea-foods play a greater part in the diet that is quite different from the mainland Most of dishes are prepared from local foods and the marine products. That traditional food that have been developed through the lifestyle are now becoming the great interest to both foreign and domestic guests. In this research, we have concluded that developing a cheju's traditional food manu and local manu cooking method. 1. Improvement of cooking method. - development of cheju's traditional Food material and spice. 2. Use not raw fish - boiling, grilling, frying 3. Improvement of cheju's local Food's name. 4. Use the only Boneless fish. 5. taste reformation of Fermentation Food - Masking the TMA etc. 6. Use the many Spice in local food.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.545-546
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• 2006

The improved model that external capacitances are connected to a conventional BSIM3v3 RF Macro model with Rg and Rsub is developed in this paper. The extracted external capacitances and resistances are modeled by scalable fitting equations. The modeled S-parameters of $0.13{\mu}m$ NMOSFET agree well with measured ones from 10MHz to 10GHz, verifying the accuracy of the improved model.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.1
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• pp.13-17
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• 2013

In this paper, we designed a charge pump circuit using level shifter for LED driver IC. The designed circuit makes the 15 V output voltage from the 5 V input in condition of 50 kHz switching frequency. The prototype chip which include the proposed charge pump circuit and its several internal sub-blocks such as oscillator, level shifter was fabricated using a 0.35 um 20 V BCD process technology. The size of the fabricated prototype chip is 2,350 um ${\times}$ 2,350 um. We examined performances of the fabricated chip and compared its measured results with SPICE simulation data.

• Transactions on Electrical and Electronic Materials
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• v.12 no.1
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• pp.7-10
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• 2011

High voltage (HV) integrated circuits are viable alternatives to discrete circuits in a wide variety of applications. A HV device generally used in these circuits is a lateral double diffused metal oxide semiconductor (LDMOS) transistor. Attempts to model LDMOS devices are complicated by the existence of the lightly doped drain and by the extension of the poly-silicon and the gate oxide. Several physically based investigations of the bias-dependent drift resistance of HV devices have been conducted, but a complete physical model has not been reported. We propose a new technique to model HV devices using both the BSIM3 SPICE model and a bias dependent resistor model (sub-circuit macro model).

• Journal of information and communication convergence engineering
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• v.19 no.4
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• pp.263-268
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• 2021

Although the compact capacitance model of point tunneling types of tunneling field-effect transistors (TFET) has been proposed, those of line tunneling types of TFETs have not been reported. In this study, a compact capacitance model of an L-shaped TFET (LTFET), a line tunneling type of TFET, is proposed using the previously developed surface potentials and current models of P- and L-type LTFETs. The Verilog-A LTFET model for simulation program with integrated circuit emphasis (SPICE) was also developed to verify the validation of the compact LTFET model including the capacitance model. The SPICE simulation results using the Verilog-A LTFET were compared to those obtained using a technology computer-aided-design (TCAD) device simulator. The current-voltage characteristics and capacitance-voltage characteristics of N and P-LTFETs were consistent for all operational bias. The voltage transfer characteristics and transient response of the inverter circuit comprising N and P-LTFETs in series were verified with the TCAD mixed-mode simulation results.

• The KIPS Transactions:PartD
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• v.9D no.5
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• pp.887-896
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• 2002

Based on SPICE (Software Process Improvement and Capability dEtermination) evaluation model, SPIRE (Software Process Improvement in Regions of Europe) is developed and published as a process improvement model for small and medium size organizations. However, practical selection guidelines or mapping rules between business goals and software processes do not exist within SPIRE. This research aims to construct an objective reference mapping table between business goals and software processes, and to propose a process selection method using the mapping table. The mapping table is constructed by the convergence of domestic software process experts' opinions using Delphi techniques. In the suggested process selection method, target processes are selected using the intuition of project participants or project managers as well as the reference mapping table. The feasibility of the proposed selection method has been reviewed by applying to two small software companies. Using the reference mapping table, we could select key processes which were passed over by project managers.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.10
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• pp.8-16
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• 1999

This paper presents a new simulation-based analog cell synthesis approach with improved simulation efficiency For the hierarchical synthesis of analog cells we developed the sub-circuit optimizers such as current mirror and differential input stage. Each sub-circuit optimizer can be used for synthesis of analog cells such as OTA(operational transconductance amplifier), 2-stage OP-AMP and comparator. To reduce the time spending of the simulation-based synthesis we propose 2-stage searching scheme and simulation data reusing scheme. With those schemes the synthesis time spending of OTA was reduced from 301.05sec to 56.52sec by 81.12%. Since our synthesis system doesn't need other additional physical parameters except SPICE parameters, and is independent of the process and its model level, the time spending to port to other process is minimized. We synthesized OTA and 2-stage OP-AMP respectively with our approach to show its usefulness.