• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1488-1489
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• 2006

Gas Discharge Tubes (GDTs) are widely used as surge protectors for communication applications due to their small internal capacitance. In these days, however, they are mostly used in combined configurations, because the activation voltage required to initiate the discharge process in the GDTs for sufficient amount of time can be large enough to damage surge-sensitive protected circuits. For GDTs with a considerably high initial over-voltage value, we should limit the peak voltage using a TVS or filter. As for ZnO varistors, even though their performance for voltage restriction is excellent their applications in high-frequency communication circuits have been limited because of higher internal capacitance when compared to the GDTs. In order to develop a surge protector for communication applications by taking advantages of these two devices, we built a combination circuit that connects a GDT and a ZnO varistor along with a choke coil in common and differential modes. We describe how the applied SPDs operate in protection process steps with the actual data obtained from the residual voltage measurements at each step. The experiment results show that the surge voltage restriction with the choke coil is more effective in differential mode than in common mode.

• The Journal of Internal Korean Medicine
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• v.30 no.2
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• pp.317-326
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• 2009

Objectives : This study investigated the correlation between the incidence by the climate of the day and the Stems and Branches(干支) of stroke patients. Methods : From January in 2000 to March in 2008, we studied 370 stroke patients hospitalized at Dongguk University Bundang Hospital. Each participant was investigated for the day's average temperature, the day's average air humidity, the day's average wind speed, and the day's Stems and Branches (干支) in oriental medical theory. Results: Concerning the day's average temperature, the group at a temperature under 18 $^{\circ}C$ had the highest risk. For the day's average air humidity, the group at over 60 % humidity showed a higher ratio of stroke. In respect of the day's average wind speed, the group at speeds under 2.26 $^m/s^2$ (the last 5 years average wind speed in Gyeonggi-do) had a higher risk. In the aspect of Stems and Branches (干支), stroke occurred more in Yin day(陰日) than in Yang day(陽日). In the view of the Five Circuits (五運), the Wood (木) was most common followed by Fire(火). Using the relation between Stems and Branches (干支), the mutuality cooperate pattern was more common than the mutuality control group and same characteristic group. Using the Theory of Five Circuits (五運) and Six Qi (六氣), the Fire group (火) showed the highest risk. The Wood group (木) came next. Conclusions : We could suggest that stroke attack might have some significant relationship with climate, stems, and branches in oriental medical theory.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.1
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• pp.76-82
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• 2002

This paper presents a quaternary-binary decoder, a quaternary logic current buffer, and a quaternary logic full-adder using current-mode multiple-valued logic CMOS circuits. Proposed full-adder requires only 15 MOSFET, 60.5% and 48.3% decrease of devices are achieved compared with conventional binary CMOS full-adder and Current's full-adder. Therefore, decrease of area and internal nods are achieved. Designed circuits are simulated and verified by HSPICE. Proposed full-adder has 1.5 ns of propagation delay and 0.42㎽ of power consumption. Also, proposed full-adder can easily adapted to binary system by use of encoder, designed decoder and designed current buffer.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1959-1960
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• 2008

The Logic Built In Self Test (LBIST) technique is substantially applied in chip design in most many semiconductor company in despite of unavoidable overhead like an increase in dimension and time delay occurred as it used. Currently common LBIST software uses the MISR (Multiple Input Shift Register) However, it has many considerations like defining the X-value (Unknown Value), length and number of Scan Chain, Scan Chain and so on for analysis of result occurred in the process. So, to solve these problems, common LBIST software provides the solution method automated. Nevertheless, these problems haven't been solved automatically by Tri-state Bus in logic circuit yet. This paper studies the algorithm that it also suggest algorithm that reduce additional circuits and time delay as matching of pattern about 2-type circuits which are CUT(circuit Under Test) and additional circuits so that the designer can detect the wrong location in CUT: Circuit Under Test.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.2
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• pp.150-154
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• 2019

In the design of semiconductor integrated circuits, ESD is one of the important issues related to product quality improvement and reliability. In particular, as the process progresses and the thickness of the gate oxide film decreases, ESD is recognized as an important problem of integrated circuit design. Many ESD protection circuits have been studied to solve such ESD problems. In addition, the proposed device can modify the existing SCR structure without adding external circuit to effectively protect the gate oxide of the internal circuit by low trigger voltage, and prevent the undesired latch-up phenomenon in the steady state with high holding voltage. In this paper, SCR-based novel ESD(Electro-Static Discharge) device with the high holding voltage has been proposed. The proposed device has the lower triggering voltage without an external trigger circuitry and the high holding voltage to prevent latch-up phenomenon during the normal condition. Using TCAD simulation results, not only the design factors that influence the holding voltage, but also comparison of conventional ESD protection device(ggNMOS, SCR), are explained. The proposed device was fabricated using 0.35um BCD process and was measured electrical characteristic and robustness. In the result, the proposed device has triggering voltage of 13.1V and holding voltage of 11.4V and HBM 5kV, MM 250V ESD robustness.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1995.10a
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• pp.64-67
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• 1995

Transfer Molding is currently the most widely used process for encapsulation integrated circuits(;IC). Although the process has been introduced over 20 years ago, generating billions of parts each year, it is far from being optimized. With each new mold, epoxy mold, epoxy mold compound, and lead-frame, lengthy period and expensive qualification runs have to be performed to minimized defects ranging from wire sweep, incomplete fill, and internal voids etc. This studies describes how simulation can be applied to transfer molding to yield acceptable design and processing parameter. The non-isothermal filling of non-newtonian reactive epoxy molding compound(;EMC) in a multi-cavity mold is analyzed. Sensitivity analysis is conducted to investigate the influence of process deviations on the final molded profile. This study trend is carried out by following some heuristic process guidelines.

• Journal of the Korean Institute of Telematics and Electronics
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• v.12 no.2
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• pp.24-27
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• 1975

A Synthesis method for multiple-input change transition-sensitive asynchronous sequential circuits is proposed. Both internal states and output states are synthesized from primitive flow tables. It is Btown that cur realization is faster than that of Chuang's. It is pointed out that Chuang's realization of output states contains malfunctions. In this paper, output stales are easily realized from primitive flaw table by the method of controlled excitation.

• Proceedings of the KSR Conference
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• 2006.11b
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• pp.832-837
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• 2006

ATC facility manipulates ground-on-board information, which transmits speed limit, varying as wayside environments - safety facility, track gradient, inclination, bridge and tunnel and other factors, installed for safe operation of trains on wayside. Efficientiation and automatification of operation and maintenance is being realized, by measuring if there are any erroneous information, using a measuring car. In this paper, we study in priority the methods for measuring accurately distinctive properties of internal malfunctions of track circuits, the performance decrease of condensers, and the unbalance of return cables, which are actually required for functionality improvement of high-speed line signal measure facilities, by measuring the unbalance of return current given because of damaged factors of external track circuits.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.23-24
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• 2007

Most of modern wind turbines employs a doubly-fed induction generator (DFIG) system because it has many advantages due to variable-speed operation, relatively high efficiency and it small converter size. The DFIG system uses a wound rotor induction machine so that the magnetizing current of the generator can be fed from both the stator and the rotor. This paper presents a protection relaying algorism for DFIG using the DQ equivalent circuits. The induced voltages calculated from the stator and rotor sides are nearly the same in the steady state. They become different in the DQ equivalent circuits during an internal fault. The proposed algorithm compares the inducted voltages estimated from the stator and the rotor circuit converted into the stationary reference frame. If the difference between the induced voltages exceeds the threshold, the proposed algorithm detects an turn-to-turn fault.

• Bulletin of the Korean Chemical Society
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• v.15 no.12
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• pp.1084-1088
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• 1994

Electrical characteristics of Fe-substituted sodalites were analyzed and equivalent circuits of samples were designed using impedance and admittance data. Internal components of resistances (R$_e$, R$_b$, and R$_{gb}$) and capacitances (C$_b$, C$_dl$ and C$_D$) could be extracted by changing the frequency of measurement at three different temperatures. Upon increasing the temperature, electrical properties of the samples could be elucidated in detail by equivalent circuit. The substitution of Fe on Al site was indirectly confirmed by ESCA and the results explain the lower polarity in Na-O bond of Fe 10 mole ${\%}$-substituted sodalite.