• Title/Summary/Keyword: Insulators

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The Study of Fluoride Film Properties for Thin Film Transistor Gate Insulator Application (박막트랜지스터 게이트 절연막 응용을 위한 불화막 특성연구)

  • Kim, Do-Yeong;Choe, Seok-Won;An, Byeong-Jae;Lee, Jun-Sin
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.12
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    • pp.755-760
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    • 1999
  • Various fluoride films were investigated for a gate insulator of thin film transistor application. Conventional oxide containing materials like $SiO_2\;Ta_2O_5\; and \; Al_2O_3$ exhibited high interface states which lead to an increased threshold voltage and poor stability of TFT. In this paper, we investigated gate insulators using a binary matrix system of fluoride such as $CaF_2,\; SrF_2\; MgF_2,\; and\; BaF_2$. These materials exhibited an improvement in lattice mismatch, interface state and electrical stability. MIM and MIS devices were employed for an electrical characterization and structural property examination. Among the various fluoride materials, $CaF_2$ film showed an excellent lattice mismatch of 5%, breakdown electric field higher than 1.2MV/cm and leakage current density of $10^{-7}A/cm^2$. MIS diode having $Ca_2$ film as an insulation layer exhibited the interface states as low as $1.58\times10^{11}cm^{-2}eV^{-1}$. This paper probes a possibility of new gate insulator materials for TFT applications.

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High Density and Low Voltage Programmable Scaled SONOS Nonvolatile Memory for the Byte and Flash-Erased Type EEPROMs (플래시 및 바이트 소거형 EEPROM을 위한 고집적 저전압 Scaled SONOS 비휘발성 기억소자)

  • 김병철;서광열
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.10
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    • pp.831-837
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    • 2002
  • Scaled SONOS transistors have been fabricated by 0.35$\mu\textrm{m}$ CMOS standard logic process. The thickness of stacked ONO(blocking oxide, memory nitride, tunnel oxide) gate insulators measured by TEM are 2.5 nm, 4.0 nm and 2.4 nm, respectively. The SONOS memories have shown low programming voltages of ${\pm}$8.5 V and long-term retention of 10-year Even after 2 ${\times}$ 10$\^$5/ program/erase cycles, the leakage current of unselected transistor in the erased state was low enough that there was no error in read operation and we could distinguish the programmed state from the erased states precisely The tight distribution of the threshold voltages in the programmed and the erased states could remove complex verifying process caused by over-erase in floating gate flash memory, which is one of the main advantages of the charge-trap type devices. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ cycles can be realized by the programming method for a flash-erased type EEPROM.

Preparation and crystallization of non-alkali multicomponent glasses for thick-film insulators (후막회로 절연용 다성분계 무알카리 유리의 제조 및 결정화 특성)

  • 이헌수;손명모;박희찬
    • Electrical & Electronic Materials
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    • v.8 no.1
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    • pp.95-101
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    • 1995
  • Crystallizable glasses with precipitation of celsian, anorthite, wollastonite and gahnite were prepared for the purpose of insulating dielectric layers in devices such as integrated circuit substrates. The starting glasses were prepared by melting the batches for 1 hour at 1450.deg. C and then Quenching to a distilled water. And crystallization behavior of these glasses were studied by DTA, TMA, XRD analysis and by the measurement of dielectric properties. The overall composition of the glass-ceramic consists in weight percent of 30-35% A1$_{2}$O$_{3}$, 13-26% BaO, 5-21% CaO, 10-24% ZnO, 4.5-9.0% TiO$_{2}$ and 4-8% B$_{2}$O$_{3}$. As a result, in barium-rich glasses only celsian phase was developed in the range of 850-900.deg. C. Also, the thermal expansion coefficient, dielectric constant and quality factor of these glass-ceramics were 68*10$^{-7}$ /.deg. C, about 9 and more than 1000, respectively.

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A method to reject noise signals in partial discharge signals of turbine generator (터빈 발전기의 부분방전 신호 중 노이즈 제거 방법)

  • Park, Y.H.;Park, P.G.;Kim, S.H.
    • Proceedings of the KIEE Conference
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    • 2005.10b
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    • pp.240-242
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    • 2005
  • It is well known that the PD (Partial Discharge) signals are generated if insulators have some defects such as voids in electrical facility and various PD detection methods are developed for preventing electrical troubles. So, an interest for the PD signals is higher and higher according to the high concern for the defects detection method of the aging electrical facility. When the equipment to detect PD signals installed at site and it works, a lot of noises flow in the equipment from surrounding situation and it will be mixed with original PD waveform. So we can not get the desired PD waveform. Therefore, there are many trial to reject or suppress the noise from the PD signals from long times ago. The greater of them used the hardware such as bridge circuits and frequency filters to suppress the noise. This paper proposed a novel noise rejection method in acquired data from PD detection equipment. The noise has the irregular phase and higher signal level than real PD, and noise decision is performed after inspection of pulse distribution in ${\Phi}$-q-n graph of acquired data from PD detection equipments. By experimental results on high voltage electric equipments, it is shown that proposed method has good performance. It is expected that this noise rejection technology is useful in numeric calculation and trend management of PD level.

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Improvement of surface insulation properties of engineering thermoplastics by using nano/micro composite (나노/마이크로 컴포지트를 이용한 엔지니어링 열가소성 플라스틱의 표면 절연 개선)

  • Jung, Eui-Hwan;Lim, Kee-Joe;Hur, Jun;Jeong, Jong-Hun;Kim, Pyung-Jung;Jeong, Su-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.29-29
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    • 2010
  • Engineering plastics have excellent electrical properties, mechanical strength and various characteristic which include chemical resistance, environmental resistance, weatherability at a wide temperature range. It has good characteristic(light weight, good productivity) as compare with epoxy or porcelain insulators. However, engineering plastics not suited to outdoor insulator because it isn't hydrophobic. Therefore, to over come these critical problems, we improve the surface insulation characteristics of engineering plastic by coating micro-, nano- size inorganic fillers added to RTV-SIR(Room temperature vulcanized-silicone rubber) at this plastic surface. The effect is analyzed through salt-fog test, tracking test. In conclusion, the engineering plastic coated RTV with micro-$Al_2O_3$20[phr], nano-Al(OH)3 1 ~ 3[phr] improved much better than the others.

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Improvement on Surface Properties of Engineering Plastic with Adding Micro-$Al_2O_3$, Nano-$Al(OH)_3$ (Micro-$Al_2O_3$와 Nano-$Al(OH)_3$ 첨가에 따른 엔지니어링 플라스틱의 표면특성 개선)

  • Jung, Eui-Hwan;Lee, Han-Ju;Lim, Kee-Joe;Heo, Jun;Kang, Seong-Hwa
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.03b
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    • pp.29-29
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    • 2010
  • Surface contamination and leakage current have caused operating problems. A flashover in a substation may result in destruction of an insulator or many others electrical equipment. Engineering plastics have good characteristic (light weight, good productivity and little of void) as compare with epoxy or porcelain insulators. Outdoor insulator must have resistance to contamination. However, it isn't suited to outdoor insulator because it is not hydrophobic. RTV(Room temperature vulcanizing) has a good property of hydrophobic and micro-filler. nano-filler have characteristics of obstructing exothermic reaction. In order to reduce the incidence of insulator flashover and damage, the silicon rubber contained with micro, nano-filler coating on surface of engineering plastics. In this paper, it compares tracking resistance, leakage current of the engineering plastic coated RTV with that of non-coated engineering plastic. And filled-composites performed much better than non-filled composites.

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Low-Voltage Operating N-type Organic Field-Effect Transistors by Charge Injection Engineering of Polymer Semiconductors and Bi-Layered Gate Dielectrics (N형 고분자 반도체의 전하주입 특성 향상을 통한 저전압 유기전계효과트랜지스터 특성 연구)

  • Moon, Ji-Hoon;Baeg, Kang-Jun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.10
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    • pp.665-671
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    • 2017
  • Herein, we report the fabrication of low-voltage N-type organic field-effect transistors by using high capacitance fluorinated polymer gate dielectrics such as P(VDF-TrFE), P(VDF-TrFE-CTFE), and P(VDF-TrFE-CFE). Electron-withdrawing functional groups in PVDF-based polymers typically cause the depletion of negative charge carriers and a high contact resistance in N-channel organic semiconductors. Therefore, we incorporated intermediate layers of a low-k polymerto prevent the formation of a direct interface between PVDF-based gate insulators and the semiconducting active layer. Consequently, electron depletion is inhibited, and the high charge resistance between the semiconductor and source/drain electrodes is remarkably improved by the in corporation of solution-processed charge injection layers.

I-V Characteristics of the TFT Analyzed by Tunneling in Grain Boundaries (粒界에서의 터널링으로 解析한 薄膜트랜지스터의 電流-電壓 特性)

  • Ma, Tae-Young
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.6
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    • pp.23-29
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    • 1989
  • A physical model that characterizes the field effect of the polycrystalline thin film transistor(TFT) is developed. The model discribes grains as discrete single crystal transistors and grain boundaries as insulated layers having the potential barrier, Thus TFT is considered as serial connection of single crystal transistors and insulators. In the model, the currents in the grain and the grain boundary is calculated using gradual channel approximation and tunneling theory, respetively. By comparing computed I-V characteristics with measured I-V characteristics of CdSe TFT's, potential and electric field distributions in the channel are observed and the validity of the conduction model proposed in this paper is confirmed.

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Model for predicting tool life of diamond abrasive micro-drills during micro-drilling of ceramic green bodies (세라믹 성형체의 미소구멍 가공 시 다이아몬드 입자 전착 드릴의 공구 수명 예측 모델)

  • 이학구;이대길
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2003.06a
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    • pp.593-598
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    • 2003
  • Ceramic plates containing many micro-holes are used in diverse applications such as MCP (Microchannel Plate). catalytic converters, filters, electrical insulators in integrated circuits, and so on. One of the efficient methods for machining many holes in ceramic plates is wet drilling of ceramic green bodies followed by sintering them. Since the strength of ceramic green bodies is much lower than the strength of sintered ceramic plate, ceramic green bodies can be drilled with high feed rate. The axial force during micro-drilling of ceramic green bodies increases rapidly at high feed rate, which induces the crack in workpiece. Therefore, the tool lift of micro-drill with respect to feed rate may be determined by the predicting increase of axial force. In this work, the axial force during micro-drilling was calculated using the chip flow model on the micro-drill tip. from which the tool life of diamond abrasive micro-drill during micro-drilling of ceramic green bodies was calculated.

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Effective technique to analyze transmission line conductors under high intensity winds

  • Aboshosha, Haitham;El Damatty, Ashraf
    • Wind and Structures
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    • v.18 no.3
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    • pp.235-252
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    • 2014
  • An effective numerical technique to calculate the reactions of a multi-spanned transmission line conductor system, under arbitrary loads varying along the spans, is developed. Such variable loads are generated by High Intensity Wind (HIW) events in the form of tornadoes and downburst. First, a semi-closed form solution is derived to obtain the displacements and the reactions at the ends of each conductor span. The solution accounts for the nonlinearity of the system and the flexibility of the insulators. Second, a numerical scheme to solve the derived closed-form solution is proposed. Two conductor systems are analyzed under loads resulting from HIW events for validation of the proposed technique. Non-linear Finite Element Analyses (FEA) are also conducted for the same two systems. The responses resulting from the technique are shown to be in a very good agreement with those resulting from the FEA, which confirms the technique accuracy. Meanwhile, the semi-closed form technique shows superior efficiency in terms of the required computational time. The saving in computational time has a great advantage in predicting the response of the conductors under HIW events, since this requires a large number of analyses to cover different potential locations and sizes of those localized events.