• The Journal of the Korea Contents Association
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• v.12 no.7
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• pp.11-20
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• 2012

This paper presents new instruction-level power model for an asynchronous processor, A8051. Even though the proposed model estimates power consumption as instruction level, this model reflects the behavioral features of asynchronous pipeline during the program is executed. Thus, it can effectively enhance the accuracy of power model for an asynchronous embedded processor without significant complexity of power model as well as the increase of simulation time. The proposed power model is based on the implementation of A8051 to reflect the characteristics of power consumption in A8051. The simulation results of the proposed model is compared with that of gate-level synthesized A8051. The proposed power model shows the accuracy of 94% and the simulation time for estimation the power consumption was reduced to 1,600 times.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.5 s.311
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• pp.1-7
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• 2006

This paper presents experimental instruction-level current consumption model for low power microcontroller ATmega128. The accessibility of instruction for internal memory decides power consumption of the microcontroller as much as 17% of difference between access instruction and non-access instruction. The power consumption for the given program will be increased in the proportional to the ratio of memory access instruction and lower level memory access in the hierarchy. Throughout the current consumption model, the power consumption can be predicted and optimized in the direction of reducing the frequency memory access. Also, the various optimization methods are introduced in terms of software and hardware viewpoints.

• ETRI Journal
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• v.30 no.1
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• pp.47-58
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• 2008

In sensor networks, analyzing power consumption before actual deployment is crucial for maximizing service lifetime. This paper proposes an instruction-level power estimator (IPEN) for sensor networks. IPEN is an accurate and fine grain power estimation tool, using an instruction-level simulator. It is independent of the operating system, so many different kinds of sensor node software can be simulated for estimation. We have developed the power model of a Micaz-compatible mote. The power consumption of the ATmega128L microcontroller is modeled with the base energy cost and the instruction overheads. The CC2420 communication component and other peripherals are modeled according to their operation states. The energy consumption estimation module profiles peripheral accesses and function calls while an application is running. IPEN has shown excellent power estimation accuracy, with less than 5% estimation error compared to real sensor network implementation. With IPEN's high precision instruction-level energy prediction, users can accurately estimate a sensor network's energy consumption and achieve fine-grained optimization of their software.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.7
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• pp.3152-3159
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• 2012

This paper presents the new instruction-level power model for an asynchronous processor. Until now, the various power models for estimating the power dissipation of embedded processor in SoC are proposed. Since all of them are target to the synchronous processors, the accuracy is questionable when we apply those power models to the asynchronous processor in SoC. To solve this problem, we present new power model for an asynchronous processor by reflecting the behavioral features of an asynchronous circuit. The proposed power model is verified using an implementation of asynchronous processor, A8051. The simulation results of the proposed model is compared with the measurement result of gate-level synthesized A8051. The proposed power model shows the accuracy of 90.7% and the simulation time for estimation the power consumption was reduced to 1,900 times.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.221-228
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• 2005

In this work, our goal is to develop a fast and accurate power model of the ARM926EJ-S processor in the industrial design environment. Compared with existing work on processor power modeling which focuses on the power states of processor core, our model mostly focuses on the cache power model. It gives more than 93% accuracy and 1600 times speedup compared with post-layout gate-level power estimation. We also address two practical issues in applying the processor power model to the real design environment. One is to incorporate the power model into an existing commercial instruction set simulator. The other is the re-characterization of power model parameters to cope with different gate-level netlists of the processor obtained from different design teams and different fabrication technology.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.30 no.4
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• pp.527-536
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• 2020

It has been found that an attacker can extract the secret key embedded in a security device and recover the operation instruction using power consumption traces which are some kind of side channel information. Many profiling-based side channel attacks based on a deep learning model such as MLP(Multi-Layer Perceptron) method are recently researched. In this paper, we implemented a disassembler for operation instruction set used in the micro-controller AVR XMEGA128-D4. After measuring the template traces on each instruction, we automatically made the pre-processing process and classified the operation instruction set using a deep learning model CNN. As an experimental result, we showed that all instructions are classified with 87.5% accuracy and some core instructions used frequently in device operation are with 99.6% respectively.

• Journal of the Korean Home Economics Association
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• v.37 no.5
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• pp.31-48
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• 1999

This research was to assess the high school girls' need about the computer assisted instruction(CAI) in the Home Economics Curriculum. In One-way ANOVA, the high school girls' need about the CAI differs in the educational level of the father and the mother, the preference for the Home Economics, the involvement with the Home Economics and the preference for a teaching method of Home Economics. MCA was done to assess the independent explanatory power of predictory variables. The educational level of father and mother were included separately in different model. The MCA that the educational level of father was included in, The most influential variable was the preference for the Home Economics and the involvement with Home Economics was the second. The MCA that the educational level of mother was included in, The most influential variable was the preference for the Home Economics and the educational level of mother was the second.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.226-229
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• 2000

In this paper, we describe implementation of 32-Bit RISC Core for portable communication/information equipment, such as cellular telephones and personal digital assistants, notebook, etc. The RISC core implements the ARM$\^$R/V4 instruction set on the basis of low power techniques in architecture level and logic level. It operates with 5-stage pipeline, and has harvard architecture to increase execution speed. The processor is modeled and simulated in RTL level using VHDL. Behavioral Cache and MMU are added to the VHDL model for instruction level verification of the processor. The core is implemented using Mentor P'||'&'||'R tools with IDEC C-631 Cell library of 0.6$\mu\textrm{m}$ CMOS 1-poly 3-metal CMOS technology.

• The Journal of Korean Association of Computer Education
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• v.15 no.3
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• pp.1-10
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• 2012

The flow of computer education in modern knowledge and information society contains the computer science courses to cultivate the higher-level thinking abilities such as logical thinking skills, creativity, and problem-solving ability of learners. The purpose of this study is to recognize the need to promote the algorithmic thinking power to improve the problem solving ability of learners, to design the algorithm class based on the anchored instruction strategy for elementary school students and to verify the effectiveness. Anchored instruction model and cases are added to the class. Elementary school students were subjects and divided into a control group in which the traditional algorithm teaching method was conducted and an experimental group in which algorithm class was conducted applying anchored instruction. As results, an experimental group has shown improvements on problem solving compared to a control group.

• The Korean Journal of Archival Studies
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• no.15
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• pp.67-93
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• 2007

This article deals with the short history from 1999 to the present time, how the Korean record and archives management world had grown up, and what the development of the branch of records and archives studies resulted in. First of all, it is looked out upon the transition and feature of each initiative bodies of records management, containing the records producing body, records and archives management body, records and archives professional body, and civil society. As a result, this article points out the disequilibrium state of the records producing body and civil society, for all the growth of records and archives management institutions and records and archives professionals. During the time of establishing the law, the Korean records and archives management had been made a rapid progress by some part of the leading group being to Korean Records and Archives Service and the society of professionals. But it is estimated only the malformed development depending on the model of elites, although we could achieve the establishment of Korean Records and Archives Act. The condition of records and archives management of the Participation Government was distinguish from the state of former times, being driven up the renovation of records and archives management. The main power of the renovation was sought our by overcome of the elite model with the development of archival institutions and professionals extending wide range. Particularly professionals to accept the education of graduate school grew up in quantity and quality and then they let the pattern of the collaboration with archival institutions rake root in Korea. As The Road Map on the Renovation of National Records and Archives Management was made, the government put into practice, so the management of records and archives in Korea could take a step of steady and continuous growth. But the development of the records producing bodies and civil society is staying at the low level as yet. Accordingly it is expected to have the most important means that the professional instruction become to normalize and archivists who posted in public agencies after graduating professional education program discharge their duties. And each public agencies have to speed up to set up the institutions for records management including some archivists so that overcome the condition of underdevelopment as fast as possible.