• Journal of Korean Home Economics Education Association
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• v.16 no.4 s.34
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• pp.9-26
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• 2004

The purposes of this study are to develop and apply the student activity centered career exploring program and to verify effectiveness on the students' career maturity level. The subjects of this study were 137 students. 4 classes of a middle school in Jinju. They were divided into two groups, the experimental group and the control group. For experiment, the career exploring program was input to the experimental group for 14 class hours. The results of this study are as follows: 1. The student activity centered career exploring program applied to the unit $\ulcorner$The Choice of Career and Job Morals$\lrcorner$ was effective in raising the attitude of the career maturity level. As the result of verifying the differences. there was a statistically significant difference between the experimental group and the control group in the planning quality and the attitude of works. 2. The student activity centered career exploring program applied to the unit $\ulcorner$The Choice of Career and Job Morals$\lrcorner$ was effective in raising the ability field of the career maturity level. The experimental group showed more statistically meaningful differences in the knowledge of jobs, the information exploring, and the self-understanding than the control group. Consequently. the effects of the student activity centered career exploring program on the career maturity level in the unit $\ulcorner$The Choice of Career and Job Morals$\lrcorner$. all the fields of the career maturity level showed the statistically meaningful differences except the independence quality of the attitude field and the decision making of the ability field. So it is concluded that the experiment program elevated the students' career maturity level. However. as the result of analysing independent sample t-test of the pre-test and the post-test. the program was ineffective in the independence quality and the decision making. When this career exploring program is applied to the unit $\ulcorner$The Choice of Career and Job Morals$\lrcorner$. it is recommended to strengthen the activities to cultivate the independence quality and the decision making power.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.895-904
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• 2007

This paper proposes a robust sub-optimal smart antenna in Code Division Multiple Access (CDMA) basestation. It makes use of the property of the Least Mean Square (LMS) algorithm and the Conjugate Gradient Method (CGM) algorithm for beamforming processes. The weight update takes place at symbol level which follows the PN correlators of receiver module under the assumption that the post correlation desired signal power is far larger than the power of each of the interfering signals. The proposed algorithm is simple and has as low computational load as five times of the number of antenna elements(O(5N)) as a whole per each snapshot. The output Signal to Interference plus Noise Ratio (SINR) of the proposed smart antenna system when the weight vector reaches the steady state has been examined. It has been observed in computer simulations that proposed beamforming algorithm improves the SINR significantly compared to the single antenna case. The convergence property of the weight vector has also been investigated to show that the proposed hybrid algorithm performs better than CGM and LMS during the initial stage of the weight update iteration. The Bit Error Rate (BER) characteristics of the proposed array has also been shown as the processor input Signal to Noise Ratio (SNR) varies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.27-35
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• 2008

This work proposes a 14b 150MS/s 0.13um CMOS ADC for SDR systems requiring simultaneously high resolution, low power, and small size at high speed. The proposed ADC employs a calibration-free four-step pipeline architecture optimizing the scaling factor for the input trans-conductance of amplifiers and the sampling capacitance in each stage to minimize thermal noise effects and power consumption at the target resolution and sampling rate. A signal- insensitive 3-D fully symmetric layout achieves a 14b level resolution by reducing a capacitor mismatch of three MDACs. The proposed supply- and temperature- insensitive current and voltage references with on-chip RC filters minimizing the effect of switching noise are implemented with off-chip C filters. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates a measured DNL and INL within 0.81LSB and 2.83LSB, at 14b, respectively. The ADC shows a maximum SNDR of 64dB and 61dB and a maximum SFDR of 71dB and 70dB at 120MS/s and 150MS/s, respectively. The ADC with an active die area of $2.0mm^2$ consumes 140mW at 150MS/s and 1.2V.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.1-9
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• 2008

This paper suggests the triple-mode CMOS DC-DC converter that has temperature/voltage variation compensation techniques. The proposed triple-mode CMOS DC-DC converter is used to generate constant or variable voltages of 0.6-2.2V within battery source range of 3.3-5.5V. Also, it supports triple modes, which include Pulse Width Modulator (PWM) mode, Pulse Frequency Modulator (PFM) mode and Low Drop-Out (LDO) mode. Moreover, it uses 1MHz low-power CMOS ring oscillator that will compensate malfunction of chip in temperature/voltage variation condition. The proposed triple-mode CMOS DC-DC converter, which generates output voltages of 0.6-2.2V with an input voltage sources of 3.3-5.5V, exhibits the maximum output ripple voltage of below 10mV at PWM mode, 15mV at PFM mode and 4mV at LDO mode. And the proposed converter has maximum efficiency of 93% at PWM mode. Even at $-25{\sim}80^{\circ}C$ temperature variations, it has kept the output voltage level within 0.8% at PWM/PFM/LDO modes. For the verification of proposed triple-mode CMOS DC-DC converter, the simulations are carried out with $0.35{\mu}m$ CMOS technology and chip test is carried out.

• Journal of the Earthquake Engineering Society of Korea
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• v.5 no.3
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• pp.65-71
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• 2001

The nuclear power plant(NPP) should be shut down for inspection and tests prior to a return to power if the earthquake exceeds the operating basis earthquake(OBE). The OBE at the plant is considered to have been exceeded if the computed cumulative absolute velocity(CAV) from the earthquake record is greater than 0.16g-sec. However, the CAV criterion should be determined considering the seismic and structural characteristics of the plant. An experimental study using shaking table is conducted in this study to evaluate intensity of CAV criterion. Appropriate level of CAV is evaluated based on the test results using the developed seismic damage indicator(SDI) model. The model consists of stacked acrylic cylinders and is developed to behave consistently for each directional seismic load. The result of the experimental study in dicates that the CAV criterion of 0.16g-sec is conservative enough to be applied to Korean NPPs since the CAV value of the seismic input motion of the Korean standard NPPs ranges from 0.3 to 0.5 g-sec. The developed SDI is expected to be useful not only in easily determining OBE exceedance but also in evaluating earthquake damage quantitatively to provide guidelines for better post-shutdown inspection and test.

• Environmental and Resource Economics Review
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• v.15 no.1
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• pp.71-94
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• 2006

Reducing fishing capacity is one of hot issues in the world fisheries. Increased fishing capacity causes not only fish stocks to be depleted, but also additional fishing costs to be incurred, resulting in reductions of fishing profits. In order to achieve a sustainable and profitable development of fisheries, it is inevitable to reduce fishing capacity. For this reason, FAO adopted 'the International Plan of Action for the Management of Fishing Capacity' and recommended member countries to estimate fishing capacity and to implement the policy to reduce fishing capacity. This study is aimed at measuring fishing capacity of Large Purse Seines Fishery using a Data Envelopment Analysis (DEA). The DEA result showed that the practical catch of large purse seine fishery in 2003 was 158,662 tons, but the capacity output for current input was 318,397 tons. The capacity utilization is about 50%, it is obvious the capacity did not utilize enough. The sensitivity analysis on DEA results indicated that the number of ships (including tonnage and horse power) should be scrapped by 50% or days fished should be reduced by 63% if the present catch remained. In addition, if the catch remains at the MSY base level of large purse seines, the analysis suggested that the number of ships (including tonnage and horse power) should be reduced by 30%, otherwise days fished should be reduced by 60%.

• Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
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• v.6 no.4
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• pp.245-255
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• 2008

Korea Hydro and Nuclear Power Company(KHNP) conducted site investigations for a low and intermediate-level nuclear waste repository in the Gyeong Ju site. The site characterization work constitutes a description of the site, its regional setting and the current state of the geosphere and biosphere. The main objectives of hydogeological investigation aimed to understand the hydrogeological setting and conditions of the site, and to provide the input parameters for safety evaluation. The hydogeological characterization of the site was performed from the results of surface based investigations, i.e geological mapping and analysis, drilling works and hydraulic testing, and geophysical survey and interpretation. The hydro-structural model based on the hydrogeological characterization consists of one-Hydraulic Soil Domain, three-Hydraulic Rock Domains and five-Hydraulic Conductor Domains. The hydrogeological framework and the hydraulic values provided for each hydraulic unit over a relevant scale were used as the baseline for the conceptualization and interpretation of flow modeling. The current hydrogeological characteristics based on the surface based investigation include some uncertainties resulted from the basic assumption of investigation methods and field data. Therefore, the reassessment of hydrostructure model and hydraulic properties based on the field data obtained during the construction is necessitated for a final hydrogeological characterization.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.5 s.347
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• pp.54-63
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• 2006

This work proposes a 14b 100MS/s 0.18um CMOS ADC with optimized resolution, conversion speed, die area, and power dissipation to obtain the performance required in the fourth-generation mobile communication systems. The 3-stage pipeline ADC, whose optimized architecture is analyzed and verified with behavioral model simulations, employs a wide-band low-noise SHA to achieve a 14b level ENOB at the Nyquist input frequency, 3-D fully symmetric layout techniques to minimize capacitor mismatch in two MDACs, and a back-end 6b flash ADC based on open-loop offset sampling and interpolation to obtain 6b accuracy and small chip area at 100MS/s. The prototype ADC implemented in a 0.18um CMOS process shows the measured DNL and INL of maximum 1.03LSB and 5.47LSB, respectively. The ADC demonstrates a maximum SNDR and SFDR of 59dB and 72dB, respectively, and a power consumption of 145mW at 100MS/s and 1.8V. The occupied active die area is $3.4mm^2$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.5
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• pp.872-882
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• 1994

In this paper, the Low Noise Amplifier(LNA) is designed and fabricated to include a band pass filter characteristics considering the antenna system characteristics according to the transmitting and receiving signal level of communication satellite transponder. As an example, a 2-stage low noise amplifier and a 4-stage amplifier and designed, fabricated and measured at 14,0~14.5GHz of receiving frequency band. This fabricated LNA has shown the gain with very good flatness within pass-band, and its gain decreases rapidly out of band resulting in supperssion of the transmitting signal power leakage. It has shown the 20.3dB +- 0.1dB of pass-band gain, the 1.44dB +-0.04dB of noise figure and the 14dB rejection out of band(12.25~12.75GHz). The gain flatness, noise figure and group delay of this 2-stage LNA satisfactorily met the simulation results. And the fabricated 4-stage amplifier has shown the more than 42dB of pass-band gain, the +-0.25dB of flatness and the 28dB of the rejection effect for transmitting power leakage. The 2-stage LNA and 4-stage amplifier, in this paper, will bring a design margin for the input filter and also result in the system cost reduction.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.1 s.116
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• pp.37-43
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• 2007

In this.paper, we introduce design and implementation results of the single balanced diode mixer for European point-to-point microwave radio in order to improve flatness performance. When a resonator such as RF filter is integrated with a mixer, impedance characteristic of 50 ohm is maintained only in RF band, not in LO band resulting deterioration of flatness performance because of LO power variation on the diode. In the paper, we suggest a design method of mixer integrated with image rejection filter and LO harmonic filter to have a better performance of flatness using embedding electrical length between filter and mixer's port. Frequency specification of fabricated mixer is $21.2{\sim}22.6\;GHz$ for RF, $19.32{\sim}20.72\;GHz$ for LO and 1.88 GHz+/-50 MHz for IF, respectively. Measured results show conversion loss of 8.5 dB, flatness of 2 dB, input PldB of 8 dBm, IIP3 of 15 dBm under LO power level of 10 dBm. Return losses of RF, LO and IF port are under -12 dB, -10 dB and -5 dB, respectively. Isolations of LO/RF and LO/IF are 20 dB and 50 dB, respectively.