• Title/Summary/Keyword: Increase output voltage level

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Comparison of Multilevel Inverters Employing DC Voltage Sources Scaled in the Power of Three

  • Hyun, Seok-Hwan;Kwon, Cheol-Soon;Kim, Kwang-Soo;Kang, Feel-Soon
    • Journal of international Conference on Electrical Machines and Systems
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    • v.1 no.4
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    • pp.457-463
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    • 2012
  • Cascaded H-bridge multilevel inverters shows a useful circuit configuration to increase the number of output voltage levels to obtain high quality output voltage. By applying the concept of the power of three to dc voltage sources, it can increase the number of output voltage levels effectively. To realize this concept, two approaches may be considered. One is to use independent dc voltage sources pre-scaled in the power of three, and the other is to use instantaneous dc voltage sources generated from a cascaded transformer, which has the secondary turn-ratios scaled in the power of three in sequence. A common feature in both approaches is to use the concept of the power of three for dc voltage sources, and a point of difference is whether it adopts a low frequency transformer or not, and where the transformer is located. According to the difference, application areas are limited and show different characteristics on THD of output voltages. We compare and analyze both approaches for their circuit configurations, voltage level generating method, THD characteristics of output voltage, efficiency, application areas, limitations, and other characteristics by experiments using 500 [W] prototypes when they generate a 27-level output voltage.

Voltage Balancing Control of Input Voltage Source Employing Series-connected Capacitors in 7-level PWM Inverter (7-레벨 PWM 인버터의 직렬 커패시터 입력전원의 전압균형제어)

  • Kim, Jin-San;Kang, Feel-soon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.2
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    • pp.209-215
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    • 2018
  • This paper present a 7-level PWM inverter adopting voltage balancing control to series-connected input capacitors. The prior proposed 7-level PWM inverter consists of dc input source, three series-connected capacitors, two bidirectional switch modules, and an H-bridge. This circuit topology is useful to increase the number of output voltage levels, however it fails to generate 7-level in output voltage without consideration for voltage balancing among series-connected capacitors. Capacitor voltage imbalance is caused on the different period between charging and discharging of capacitor. To solve this problem, we uses the amplitude modulation of carrier wave, which is used to produce the center output voltage level. To verify the validity of the proposed control method, we carried out computer-aided simulation and experiments using a prototype.

A Novel Ripple-Reduced DC-DC Converter

  • Tao, Yu;Park, Sung-Jun
    • Journal of Power Electronics
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    • v.9 no.3
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    • pp.396-402
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    • 2009
  • A DC/DC converter generally needs to work under high switching frequency when used as an adjustable power supply to reduce the size of magnetic elements such as inductors, transformers and capacitors, but with the rising of the switch frequency, the switch losses will increase and the efficiency will reduce. Recently, to solve these problems, research is actively being done on a soft switching method that can be applied under high frequency and on a PWM converter that can be applied under low frequency such as a multi-level topology. In this paper a novel DC-DC conversion method for reducing the ripple of output voltage is proposed. In the proposed converter, buck converters are connected in series to generate the output voltage. By using this method, the ripple of output voltage can be reduced compared to a conventional buck converter. Particularly when output voltage is low, the number of acting switching elements is less and the result of ripple reduction is more obvious. It is expected that the converter proposed in this paper could be very useful in the case of wide-range output voltage.

Basic Characteristic of 5-level Inverter with Different Divided DC Link Voltage

  • Matsuse, Kouki;Matsumoto, Takafumi;Kodera, Yuji
    • Journal of international Conference on Electrical Machines and Systems
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    • v.2 no.2
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    • pp.179-183
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    • 2013
  • This paper report on experimental results of 5-level inverter by DC divided link voltage. We have alreday reported that DC divided link valtage comes to be able to reduse harmonic of out line voltage. So we tested whether DC divided link voltage can reduce harmonics in experimental setup. This paper shows simulation results and experimental results. And we confirmed that DC divided link voltage can also apply in experimental setup.

Optimal Topologies for Cascaded Sub-Multilevel Converters

  • Babaei, Ebrahim
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.251-261
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    • 2010
  • The general function of a multilevel converter is to synthesize a desired output voltage from several levels of dc voltages as inputs. In order to increase the steps in the output voltage, a new topology is recommended in [1], which benefits from a series connection of sub-multilevel converters. In the procedure described in this reference, despite all the advantages, it is not possible to produce all the steps (odd and even) in the output. In addition, for producing an output voltage with a constant number of steps, there are different configurations with a different number of components. In this paper, the optimal structures for this topology are investigated for various objectives such as minimum number of switches and dc voltage sources and minimum standing voltage on the switches for producing the maximum output voltage steps. Two new algorithms for determining the dc voltage sources magnitudes have been proposed. Finally, in order to verify the theoretical issues, simulation and experimental results for a 49-level converter with a maximum output voltage of 200V are presented.

Multilevel Inverter using Two 5-level Inverters Connected in Series (두 대의 5-레벨 인버터의 직렬결합을 이용한 멀티레벨인버터)

  • Choi, Won-Kyun;Kwon, Cheol-Soon;Hong, Un-Taek;Kang, Feel-Soon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.5
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    • pp.376-380
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    • 2010
  • This paper presents a circuit configuration of multilevel inverter to increase the number of output voltage levels by using conventional 5-level inverters connected in series. Most of all it can maximize the number of output voltage levels by employing input voltage sources, which have the power of five. When it synthesizes the same number of output voltage levels, the proposed inverter can save the number of switching devices compared with the conventional cascaded H-bridge cell inverter. So it can reduce the size, cost, power consumption of the system. We implemented computer-aided simulation and experiments for a 25-level inverter employing two 5-level inverters.

The Maximum Installable DG Capacity According to Operation Methods of Voltage Regulator in Distribution Systems (배전계통의 전압조정기 운영방법에 따른 분산형전원 최대 도입 용량 산출)

  • Kim, Mi-Young
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.7
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    • pp.1263-1269
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    • 2009
  • Stable and sustainable power supply means maintaining a certain level of power quality and service while securing energy resource and resolving environmental issues. Distributed generation (DG) has become an essential and indispensable element from environmental and energy security perspectives. It is known that voltage violation is the most important constraint for load variation and the maximum allowable DG. In distribution system, sending voltage from distribution substation is regulated by ULTC (Under Load Tap Changer) designed to maintain a predetermined voltage level. ULTC is controlled by LDC (Line Drop Compensation) method compensating line voltage drop for a varying load, and the sending voltage of ULTC calls for LDC parameters. The consequence is that the feasible LDC parameters considering variation of load and DG output are necessary. In this paper, we design each LDC parameters determining the sending voltage that can satisfy voltage level, decrease ULTC tap movement numbers, or increase DG introduction. Moreover, the maximum installable DG capacity based on each LDC parameters is estimated.

Hybrid Cascaded MLI topology using Ternary Voltage Progression Technique with Multicarrier Strategy

  • Venugopal, Jamuna;Subarnan, Gayathri Monicka
    • Journal of Electrical Engineering and Technology
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    • v.10 no.4
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    • pp.1610-1620
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    • 2015
  • A major problem in conventional multilevel inverter is that an increase in power semiconductor switches causes an increase in cost and switching losses of the inverter. The multicarrier strategy adopted for the multilevel inverters has become more popular due to reduced cost, lower harmonic distortion, and higher voltage capability than the conventional switching strategy applied to inverters. Various topologies and modulation strategies have been reported for utility and drive applications. Level shifted based pulse width modulation techniques are proposed to investigate the performance of the multilevel inverter. The proposed work focuses on reducing the utilized switches so that the cost and the switching losses of the inverter do not go up and the consistent efficiency could be achieved. This paper presents the detailed analysis of these topologies. The analysis is based on the number of switches, DC sources, output level, maximum voltage, and the efficiency. As an illustration, single phase cascaded multilevel inverter topologies are simulated using MATLAB/SIMULINK and the experimental results demonstrate the viability of these inverters.

A New 19-level PWM Inverter for the Use of Stand-alone Photovoltaic Power Generation Systems (독립형 태양광 발전 시스템을 위한 새로운 19레벨 PWM 인버터)

  • 강필순;오석규;박성준
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.53 no.7
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    • pp.452-461
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    • 2004
  • A novel multilevel PWM inverter is presented for the use of stand-alone photovoltaic power generation system. In appearance, it consists of three full-bridge modules and three cascaded transformers; therefore, the configuration of the proposed multilevel PW inverter is equal to that of a prior 11-level PWM inverter. Only the turn-ratio of a transformer and its corresponding switching function are different from each other. Owing to these differences, the proposed 19-level PWM inverter has two promising advantages. First, output voltage levels increase almost twofold. Consequently, it can generate more sinusoidal output voltage waveform. Second, due to a revised switching pattern, it lightens power imposed on the transformer, which is used for compensating output voltages with chopped pulses between steps. The validity of the proposed inverter system is verified by computer-aided simulations and experimental results based on a 1 [kW] prototype. The performance of the proposed 19-level PWM inverter is compared with the Prior 11-level PWM inverter and other counterparts.

Optimal Scheduling of Level 5 Electric Vehicle Chargers Based on Voltage Level

  • Sung-Kook Jeon;Dongho Lee
    • Journal of the Korean Society of Industry Convergence
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    • v.26 no.6_1
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    • pp.985-991
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    • 2023
  • This study proposes a solution to the voltage drop in electric vehicle chargers, due to the parasitic resistance and inductance of power cables when the chargers are separated by large distances. A method using multi-level electric vehicle chargers that can output power in stages, without installing an additional energy supply source such as a reactive power compensator or an energy storage system, is proposed. The voltage drop over the power cables, to optimize the charging scheduling, is derived. The obtained voltage drop equation is used to formulate the constraints of the optimization process. To validate the effectiveness of the obtained results, an optimal charging scheduling is performed for each period in a case study based on the assumed charging demands of three connected chargers. From the calculations, the proposed method was found to generate an annual profit of $20,800 for a $12,500 increase in installation costs.