• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.354.1-354.1
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• 2014

Hafnium nitride (HfN) 박막은 고온에서의 안정성과 낮은 비저항 그리고 산소확산에 대한 억제력을 가지고 있기 때문에 확산방지막으로 많은 연구가 진행 되고 있다. 현재까지 진행된 대부분의 연구는 HfN 박막의 전기적인 특성과 구조적인 특성에 대한 것이었고 다양한 연구 결과가 보고되었다. 하지만 기존의 연구들은 박막의 nano-electrotribology 특성에 대한 연구가 부족하여 박막 적층 공정시 요구되는 물성에 대한 연구가 절실하다. 따라서 본 연구에서는 HfN 박막의 증착조건 및 열처리조건에 따른 nano-electrotribology 특성 변화를 확인하고자 하였다. HfN박막은 rf magnetron sputter를 이용하여 Si 기판위에 Hf target으로 질소 유량을 변화시키며 증착하였고 가열로에서 $600^{\circ}C$와 $800^{\circ}C$로 20분간 열처리를 실시하였다. 열처리한 박막과 as-deposited 상태의 박막을 nano-indenter를 통하여 나노기계 전기적인 특성을 분석하였다. nano-indenter는 박막에 인가된 stress와 탄성계수(elastic modulus), 표면경도(surface hardness)와 같은 특성을 직접적인 tip 접촉을 통하여 in-situ로 분석할 수 있는 장비이다. 실험결과 HfN박막을 $600^{\circ}C$로 열처리 한 경우 표면경도가 16.20에서 18.59 GPa로 증가하였다. 표면경도의 증가는 열처리 시 박막내에 compressive stress가 생성되었기 때문이라고 생각된다. 그러나 $800^{\circ}C$로 열처리 한 경우 표면경도가 16.93 GPa로 감소하였는데 이는 표면균열 발생으로 인한 stress relaxation 때문인 것으로 생각된다. 증착 시 주입되는 질소의 유량과 열처리 온도는 HfN박막의 기계적 안정성에 영향을 미치는 중요한 요소임을 본 실험을 통해 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.210-214
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• 2016

In this paper, the decrease in the contact resistance of Ni germanide/Ge contact was studied as a function of the thickness of the antimony (Sb) interlayer for high performance Ge MOSFETs. Sb layers with various thickness of 2, 5, 8 and 12 nm were deposited by RF-Magnetron sputter on n-type Ge on Si wafers, followed by in situ deposition of 15nm-thick Ni film. The contact resistance of samples with the Sb interlayer was lower than that of the reference sample without the Sb interlayer. We found that the Sb interlayer can lower the contact resistance of Ni germanide/Ge contact but the reduction of contact resistance becomes saturated as the Sb interlayer thickness increases. The proposed method is useful for high performance n-channel Ge MOSFETs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.149-153
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• 2003

Chemical mechanical polishing (CMP) technology for global planarization of multi-level inter-connection structure has been widely studied for the next generation devices. CMP process has been paid attention to planarized pre-metal dielectric (PMD), inter-layer dielectric (ILD) interconnections. Expecially, shallow trench isolation (STI) used to CMP process on essential. Recently, the direct STI-CMP process without the conventional complex reverse moat etch process has established by using slurry additive with the high selectivity between $SiO_2$ and $Si_3N_4$ films for the purpose of process simplification and n-situ end point detection(EPD). However, STI-CMP process has various defects such as nitride residue, tom oxide and damage of silicon active region. To solve these problems, in this paper, we studied the planarization characteristics using a high selectivity slurry(HSS). As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of HSS STI-CMP process.

• Korean Journal of Materials Research
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• v.13 no.1
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• pp.1-5
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• 2003

Uniform polycrystalline $CoSi_2$layers have been grown in situ on a polycrystalline Si substrate at temperature near $625^{\circ}C$ by reactive chemical vapor deposition of cyclopentadienyl dicarbonyl cobalt, Co(η$^{5}$ -C$_{5}$ H$_{5}$ )(CO)$_2$. The growth behavior and thermal stability of $CoSi_2$layer grown on polycrystalline Si substrates were investigated. The plate-like CoSi$_2$was initially formed with either (111), (220) or (311) interface on polycrystalline Si substrate. As deposition time was increasing, a uniform epitaxial $CoSi_2$layer was grown from the discrete $CoSi_2$plate, where the orientation of the$ CoSi_2$layer is same as the orientation of polycrystalline Si grain. The interface between $CoSi_2$layer and polycrystalline Si substrate was always (111) coherent. The growth of the uniform $CoSi_2$layer had a parabolic relationship with the deposition time. Therefore we confirmed that the growth of $CoSi_2$layer was controlled by diffusion of cobalt. The thermal stability of $CoSi_2$layer on small grain-sized polycrystalline Si substrate has been investigated using sheet resistance measurement at temperature from $600^{\circ}C$ to $900^{\circ}C$. The $CoSi_2$layer was degraded at $900^{\circ}C$. Inserting a TiN interlayer between polycrystalline Si and $_CoSi2$layers improved the thermal stability of $CoSi_2$layer up to $900^{\circ}C$ due to the suppression of the Co diffusion.

• Transactions on Electrical and Electronic Materials
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• v.18 no.5
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• pp.253-256
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• 2017

A thin Te interlayer was applied to a Ni/n-InGaAs contact to reduce the contact resistance between Ni-InGaAs and n-InGaAs. A 5-nm-thick Te layer was first deposited on a Si-doped n-type $In_{0.53}Ga_{0.47}As$ layer, followed by in situ deposition of a 30-nm-thick Ni film. After the formation of the Ni-InGaAs alloy by rapid thermal annealing at $300^{\circ}C$ for 30 s, the extracted specific contact resistivity (${\rho}_c$) reduced by more than one order of magnitude from $2.86{\times}10^{-4}{\Omega}{\cdot}cm^2$ to $8.98{\times}10^{-6}{\Omega}{\cdot}cm^2$ than that of the reference sample. A thinner Ni-InGaAs alloy layer with a better morphology was obtained by the introduction of the Te layer. The improved interface morphology and the graded Ni-InGaAs layer formed at the interface were believed to be responsible for ${\rho}_c$ reduction.

• Proceedings of the KSME Conference
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• 2000.04b
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• pp.441-446
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• 2000

Chemical compositions of monodisperse $SiO_2/TiO_2$ multicomponent aggregates were measured for different heights from the burner surface and different mobility diameters of aggregates. $SiO_2/TiO_2$ multicomponent particles were generated in a hydrogen/oxygen coflow diffusion flame from two sets of precursors: TTIP (titanium tetraisopropoxide), TEOS(tetraethylorthosilicate). To maintain 1:1 mole ratio of TTIP:TEOS vapor theoretically, flow rate of carrier gas $N_2$ was fixed at 0.61pm for TTIP, at 0.11pm for TEOS. In situ sampling probe was used to supply particles into differential mobility analyzer(DMA) which was calibrated with using commercial DMA(TSI 3071A) and classifying monodisperse multicomponent particles. Classified particles were collected with electrophoretic collector. The distributions of composition from particle to particle were determined using EDS (energy dispersive spectrometry) coupled with TEM (transmission electron microscope). The chemical (atomic) compositions of classified monodisperse particle were obtained for different heights; z=40mm, 60mm, 80mm. The results suggested that the atomic composition of $SiO_2$ decreased with the height from burner surface and the composition of $SiO_2$ and $TiO_2$ approached to the value of 1 to 1 in far downstream. It is also found that the composition of $SiO_2$ decreases as the mobility diameter of aggregate increases.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.25 no.9
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• pp.1175-1182
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• 2001

Chemical compositions of polydisperse SiO$_2$/TiO$_2$multicomponent aggregates were measured for different heights from the burner surface and different mobility diameters of aggregates. SiO$_2$/TiO$_2$multicomponent particles were generated in a hydrogen/oxygen coflow diffusion flame from two sets of precursors: TTIP(titanium tetraisopropoxide), TEOS(tetraethylorthosilicate). To maintain 1:1 mole ratio of TTIP:TEOS vapor, flow rate of carrier gas $N_2$was fixed at 0.6lpm for TTIP, at 0.1lpm for TEOS. In-situ sampling probe was used to supply particles into DMA(differential mobility analyzer) which was calibrated with using commercial DMA(TSI, model 3071A) and classifying monodisperse multicomponent particles. Classified monodisperse particles were collected with electrophoretic collector. The distributions of composition from particles to particle were determined using EDS(energy dispersive spectrometry) coupled with TEM(transmission electron microscope). The chemical(atomic) compositions of classified monodisperse particle were obtained for different heights; z=40mm, 60mm, 80mm. The results suggested that the chemical(atomic) composition of SiO$_2$decreased with the height from burner surface and the composition of SiO$_2$and TiO$_2$approached to the value of 1 to 1 fat downstream. It is also found that the composition of SiO$_2$decreases as the mobility diameter of aggregate increases.

• Korean Journal of Materials Research
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• v.7 no.9
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• pp.811-823
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• 1997

차세대 반도체 배선분야에서, Cu박막은 현재의 AI을 대체할 물질로서 대두되고 있으며 CVD에 의한 선택적 증착은 Cu의 patterning과 관련하여 상당한 관심을 일으키고 있다. 본 연구에서는 (hfac)Cu(VTMS)의 유기원료를 사용하여, CVD공정변수, 운반기체, 표면 처리 공정에 따른 SiO$_{2}$, TiN, AI기판에 대한 선택성을조사하였다. 선택성은 저온(15$0^{\circ}C$), 저합(0.3Torr)에서 향상될 수 있었으며, 특히, HMDS in-situ-predosing공정에 의해 더욱 향상될 수 있었다. 모든 경우에 대해, H$_{2}$운반기체가 Ar 보다 짧은 incubation time과 높은 증착 속도가 얻어졌으며, Cu입자들의 크기가 작고 연결상태가 보다 양호하였다. 이는 H$_{2}$경우에 기판표면에 원료가 흡착되어 핵을 형성시키는 위치 (-OH)가 보다 많이 제공되기 때문으로 여겨진다. 이러한 미세구조의 차이는 H$_{2}$경우에 보다 낮은 비저항을 얻게 했다. HMDS in-situ predosing공정에 의한 Cu박막내 불순물 차이는 없었으며 뚜렷한 비저항의 차이도 나타나지 않았다.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.32-37
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• 2019

Titanium dioxide ($TiO_2$) is a promising dielectric material in the semiconductor industry for its high dielectric constant. However, for utilization on Si substrate, $TiO_2$ film meets with a difficulty due to the large leakage currents caused by its small conduction band energy offset from Si substrate. In this study, we propose an in-situ plasma oxidation process in plasma-enhanced atomic layer deposition (PE-ALD) system to form an oxide barrier layer which can reduce the leakage currents from Si substrate to $TiO_2$ film. $TiO_2$ film depositions were followed by the plasma oxidation process using tetrakis(dimethylamino)titanium (TDMAT) as a Ti precursor. In our result, $SiO_2$ layer was successfully introduced by the plasma oxidation process and was used as a barrier layer between the Si substrate and $TiO_2$ film. Metal-oxide-semiconductor ($TiN/TiO_2/P-type$ Si substrate) capacitor with plasma oxidation barrier layer showed improved C-V and I-V characteristics compared to that without the plasma oxidation barrier layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.7
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• pp.549-554
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• 2009

Al thin films were synthesized on TiN/Si substrate by MOCVD using N-methylpyrrolidine alane (MPA) precursor. Effects of substrate temperature, reaction pressure on the deposition rate, surface roughness and electrical resistivity were investigated. The early stage of Al thin film formation was analyzed by in-situ surface reflectivity measurement with a laser and photometer apparatus. From the Arrhenius plot of deposition rate vs. substrate temperature, it was found that the activation energy of surface reaction was 91.1kJ/mole, and the transition temperature from surface-reaction-limited region to mass-transfer-limited region was about $150^{\circ}C$. The growth rate increased with the reaction pressure, and average growth rates of $200{\sim}1,200nm/min$ were observed at various experimental conditions. Surface roughness of the film increased with the film thickness. The electrical resistivity of Al film was about $4{\mu}{\Omega}{\cdot}cm$ in the case of optimum condition, and it was close to the value of the bulk Al, $2.7{\mu}{\Omega}{\cdot}cm$.