• Title/Summary/Keyword: Implementation Phase

Search Result 1,241, Processing Time 0.03 seconds

A Study on Frequency Offset Compensation using 2-Phase Characteristic of Beacon Signal modulated by Satellite (위성 변조 비콘 신호의 2위상 특성을 이용한 주파수 오프셋 보상방법에 대한 연구)

  • Choi, Chul-Hee
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.18 no.1
    • /
    • pp.97-103
    • /
    • 2018
  • In satellite communication, modulated beacon signal is spreaded by gold sequence and the modulated beacon is transmitted via linear phase modulation. Due to the difference in characteristics of the satellite and the receiver on the ground, frequency offset (FO) occurs. An existing modulated beacon receiver is a method of synchronizing the frequency of a modulated beacon signal using FFT(Fast Fourier Transform), which not only increases the delay and complexity in terms of system implementation but also has a separate circuit for compensating the phase difference due to FO and phase offset from FFT points. In order to overcome this problem, this paper proposes and analyzes a scheme for compensating and demodulating the coarse FO and phase offset at one time using the 2-phase shaped characteristics of the modulated beacon signal. Also, through the simulation, the modulation index suitable for the proposed method is analyzed and the appropriate cumulative number is also analyzed.

A Study on the Estimating Strategy for the Design Phase VE Consulting Fee (설계VE 용역대가 산정방안에 관한 연구)

  • Kim Chul-Woong;Jung Young Il;Kim Yang-Taek;Hyun Chang-Taek
    • Korean Journal of Construction Engineering and Management
    • /
    • v.3 no.1 s.9
    • /
    • pp.97-106
    • /
    • 2002
  • at the design phase and the effective design phase VE application, it is not sufficient to implement VE study at the design phase in the domestic construction industry. The method for estimating design phase VE consulting Fee regulated in current guideline and the insufficient incentive system according to the result of design phase VE application are major problems among the problems related to the roadblock of the active implementation Design phase VE. In this paper, firstly the current methods for estimating Engineering business consulting fee analogous to design phase VE and the domestic and foreign design VE consulting fee were examined, and detailed problems related to the method for estimating design VE consulting fee were indicated, and the Improvement direction were established. Secondly, the estimating strategy for the design phase VE consulting fee and the payment strategy of incentive according to the result of savings were proposed. Finally, the strategies were verified by interview with the experts.

Phase shitter design and implementation of DGS using ferroelectric materials (강유전체를 이용한 DGS 구조의 위상 변위기 설계 및 구현)

  • Kim, Young-Ju;Park, Jun-Seok;Kim, Young-Tae;Kim, Sun-Hyeong;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
    • /
    • 2004.07c
    • /
    • pp.2014-2016
    • /
    • 2004
  • In order to obtain a low-loss ferroelectric phase shifter, the reflection-type phase shifter with ferroelectric defected ground structure (DGS) resonators has been designed in this paper. The proposed phase shifter is consist of a 3-dB $90^{\circ}$ branch-line hybrid coupler and terminated reflective circuit with tunable ferroelectric DGS resonator. The ferroelectric DGS unit structure can provide high Q resonator characteristic at high frequencies. The design parameters of equivalent circuit for the tunable DGS resonator are derived by using simple circuit analysis method and three-dimensional full wave finite element method. The fabricated phase shifter has an insertion loss of better than 3.4dB at 13.5GHz.

  • PDF

Implementation of a High Efficiency Grid-Tied Multi-Level Photovoltaic Power Conditioning System Using Phase Shifted H-Bridge Modules

  • Lee, Jong-Pil;Min, Byung-Duk;Yoo, Dong-Wook
    • Journal of Power Electronics
    • /
    • v.13 no.2
    • /
    • pp.296-303
    • /
    • 2013
  • This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

Design and Implementation of 40 Gb/s Clock Recovery Module Using a Phase-Locked Loop with hold function (유지 기능을 가지는 위상고정 루프를 이용한 40 Gb/s 클락 복원 모듈 설계 및 구현)

  • Park, Hyun;Woo, Dong-Sik;Kim, Jin-Joog;Lim, Sang-Kyu;Kim, Kang-Wook
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
    • /
    • 2005.11a
    • /
    • pp.191-196
    • /
    • 2005
  • A low-cost, high-performance 40 Gb/s clock recovery module using a phase-locked loop(PLL) for a 40 Gb/s optical receiver has been designed and implemented. It consists of a clock recovery circuit, a RF mixer and frequency discriminator for phase/frequency detection, a DR-VCO, a phase shifter, and a hold circuit. The recovered 40 GHz clock is synchronized with a stable 10 GHz DR-VCO. The clock stability and jitter characteristics of the implemented PLL-based clock recovery module has shown to significantly improve the performance of the conventional open-loop type clock recovery module with DR filter. The measured peak-to-peak RMS jitter is about 230 fs. When input signal is dropped, the 40 GHz clock is generated continuously by hold circuit. The implemented clock recovery module can be used as a low-cost and high-performance receiver module for 40 Gb/s commercial optical network.

  • PDF

Grid-tied Power Conditioning System for Fuel Cell Composed of Three-phase Current-fed DC-DC Converter and PWM Inverter

  • Jeong, Jong-Kyou;Lee, Ji-Heon;Han, Byung-Moon;Cha, Han-Ju
    • Journal of Electrical Engineering and Technology
    • /
    • v.6 no.2
    • /
    • pp.255-262
    • /
    • 2011
  • This paper proposes a grid-tied power conditioning system for fuel cell, which consists of three-phase current-fed DC-DC converter and three-phase PWM inverter. The three-phase current-fed DC-DC converter boosts fuel cell voltage of 26-48 V up to 400 V with zero-voltage switching (ZVS) scheme, while the three-phase PWM(Pulse Width Modulation) inverter controls the active and reactive power supplied to the grid. The operation of the proposed power conditioning system with fuel cell model is verified through simulations with PSCAD/EMTDC software. The feasibility of hardware implementation is verified through experimental works with a laboratory prototype with 1.2 kW proton exchange membrane (PEM) fuel cell stack. The proposed power conditioning system can be commercialized to interconnect the fuel cell with the power grid.

A Design of High-speed Phase Calculator for 3D Depth Image Extraction from TOF Sensor Data (TOF 센서용 3차원 Depth Image 추출을 위한 고속 위상 연산기 설계)

  • Koo, Jung-Youn;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.2
    • /
    • pp.355-362
    • /
    • 2013
  • A hardware implementation of phase calculator for extracting 3D depth image from TOF(Time-Of-Flight) sensor is described. The designed phase calculator, which adopts a pipelined architecture to improve throughput, performs arctangent operation using vectoring mode of CORDIC algorithm. Fixed-point MATLAB modeling and simulations are carried out to determine the optimized bit-widths and number of iteration. The designed phase calculator is verified by FPGA-in-the-loop verification using MATLAB/Simulink, and synthesized with a TSMC 0.18-${\mu}m$ CMOS cell library. It has 16,000 gates and the estimated throughput is about 9.6 Gbps at 200Mhz@1.8V.

A Single-phase Harmonics Extraction Algorithm Based on the Principle of Trigonometric Orthogonal Functions

  • Yi, Hao;Zhuo, Fang;Wang, Feng;Li, Yu;Wang, Zhenxiong
    • Journal of Power Electronics
    • /
    • v.17 no.1
    • /
    • pp.253-261
    • /
    • 2017
  • For a single-phase active power filter (APF), designing a more efficient algorithm to guarantee accurate and fast harmonics extraction with a lower computing cost is still a meaningful topic. The common idea still employs a IRPT-based Park transform, which was originally designed for 3-phase applications. Therefore, an additional virtual signal generation (VSG) link is necessary when it is used in the single-phase condition. This method, with virtual signal generation and transform, is obviously not the most efficient one. Regarding this problem, this paper proposes a novel harmonics extraction algorithm to further improve efficiency. The new algorithm is based on the principle of trigonometric orthogonal functions (TOF), and its mathematical principle and physical meaning are introduced in detail. Its implementation and superiority in terms of computation efficiency are analyzed by comparing it with conventional methods. Finally, its effectiveness is well validated through detailed simulations and laboratory experiments.

Blind symbol timing offset estimation for offset-QPSK modulated signals

  • Kumar, Sushant;Majhi, Sudhan
    • ETRI Journal
    • /
    • v.42 no.3
    • /
    • pp.324-332
    • /
    • 2020
  • In this paper, a blind symbol timing offset (STO) estimation method is proposed for offset quadrature phase-shift keying (OQPSK) modulated signals, which also works for other linearly modulated signals (LMS) such as binary-PSK, QPSK, 𝜋/4-QPSK, and minimum-shift keying. There are various methods available for blind STO estimation of LMS; however, none work in the case of OQPSK modulated signals. The popular cyclic correlation method fails to estimate STO for OQPSK signals, as the offset present between the in-phase (I) and quadrature (Q) components causes the cyclic peak to disappear at the symbol rate frequency. In the proposed method, a set of close and approximate offsets is used to compensate the offset between the I and Q components of the received OQPSK signal. The STO in the time domain is represented as a phase in the cyclic frequency domain. The STO is therefore calculated by obtaining the phase of the cyclic peak at the symbol rate frequency. The method is validated through extensive theoretical study, simulation, and testbed implementation. The proposed estimation method exhibits robust performance in the presence of unknown carrier phase offset and frequency offset.

An Implementation of High-precision Three-phase Linear Absolute Position Sensor (고정도 3상 직선형 절대 위치 센서의 구현)

  • Lee, Chang Su
    • Journal of IKEEE
    • /
    • v.19 no.3
    • /
    • pp.335-341
    • /
    • 2015
  • Recently a demand for high precision absolute position transducer is increasing in order to control thickness in steel industry. LVDT (linear variable differential transformer) is widely used to measure the absolute position in the linearly moving cylinder under poor factory environment. In this paper we implement the three phase LVDT with a high resolution of one micron and L/D (LVDT to digital) converter. First we designed U, V, and W three phase signaling using FPGA. Second a pulse output algorithm is designed for position information with A and B phase waveforms. Finally the performance is compared with previous sensors. Experiments show that the linearity deviation error is 0.009788 [mm] and the average sinusoidal THD is 0.0751%, which means 2.2% and 33% more improved result than the previous sensors respectively.