• 제목/요약/키워드: Image chip

검색결과 357건 처리시간 0.028초

대학도서관 웹 페이지의 색채이미지 분석에 관한 연구 (A Study on the Analysis of Color Image of the Web Pages of University Libraries)

  • 이철찬
    • 한국도서관정보학회지
    • /
    • 제38권1호
    • /
    • pp.89-106
    • /
    • 2007
  • 이미 운용되고 있는 우리나라 국립대학 도서관 웹 페이지의 색채이미지를 분석하여, 웹 페이지를 디자인하는데 있어서 배색이미지와 형용사이미지에 관한 정보와 방향을 제시하기 위한 것이다. 분석방법은 색채감성척도를 사용하여 분석대상 사이트에 대한 RGB값을 찾아내어 Color Chip을 추출하였으며, 배색이미지와 형용사이미지로 구분하였다. 연구의 범위는 우리나라 국립대학도서관협의회에 가입되어 있는 41개 국립대학 도서관을 대상으로 하였으며, 그 결과 많은 대학이 흰색이나 회색의 배색 바탕에다, 연한 청색계열의 색조와 녹색계열의 배색이 주를 이루었고, 형용사 이미지는 경쾌한 이미지와 밝은 이미지가 많았으며, 다음으로는 은은한 이미지, 우아한 이미지 순으로 나타났다.

  • PDF

결함검출을 위한 실험적 연구

  • 목종수
    • 한국공작기계학회:학술대회논문집
    • /
    • 한국공작기계학회 1996년도 춘계학술대회 논문집
    • /
    • pp.24-29
    • /
    • 1996
  • The seniconductor, which is precision product, requires many inspection processes. The surface conditions of the semiconductor chip effect on the functions of the semiconductors. The defects of the chip surface is crack or void. Because general inspection method requires many inspection processes, the inspection system which searches immediately and preciselythe defects of the semiconductor chip surface. We propose the inspection method by using the computer vision system. This study presents an image processing algorithm for inspecting the surface defects(crack, void)of the semiconductor test samples. The proposed image processing algorithm aims to reduce inspection time, and to analyze those experienced operator. This paper regards the chip surface as random texture, and deals with the image modeling of randon texture image for searching the surface defects. For texture modeling, we consider the relation of a pixel and neighborhood pixels as noncasul model and extract the statistical characteristics from the radom texture field by using the 2D AR model(Aut oregressive). This paper regards on image as the output of linear system, and considers the fidelity or intelligibility criteria for measuring the quality of an image or the performance of the processing techinque. This study utilizes the variance of prediction error which is computed by substituting the gary level of pixel of another texture field into the two dimensional AR(autoregressive model)model fitted to the texture field, estimate the parameter us-ing the PAA(parameter adaptation algorithm) and design the defect detection filter. Later, we next try to study the defect detection search algorithm.

  • PDF

Flip Chip Interconnection Method Applied to Small Camera Module

  • Segawa, Masao;Ono, Michiko;Karasawa, Jun;Hirohata, Kenji;Aoki, Makoto;Ohashi, Akihiro;Sasaki, Tomoaki;Kishimoto, Yasukazu
    • 한국마이크로전자및패키징학회:학술대회논문집
    • /
    • 한국마이크로전자및패키징학회 2000년도 2nd Korea-Japan Advanceed Semiconductor Packaging Technology Seminar
    • /
    • pp.39-45
    • /
    • 2000
  • A small camera module fabricated by including bare chip bonding methods is utilized to realize advanced mobile devices. One of the driving forces is the TOG (Tape On Glass) bonding method which reduces the packaging size of the image sensor clip. The TOG module is a new thinner and smaller image sensor module, using flip chip interconnection method with the ACP (Anisotropic Conductive Paste). The TOG production process was established by determining the optimum bonding conditions for both optical glass bonding and image sensor clip bonding lo the flexible PCB. The bonding conditions, including sufficient bonding margins, were studied. Another bonding method is the flip chip bonding method for DSP (Digital Signal Processor) chip. A new AC\ulcorner was developed to enable the short resin curing time of 10 sec. The bonding mechanism of the resin curing method was evaluated using FEM analysis. By using these flip chip bonding techniques, small camera module was realized.

  • PDF

단위 픽셀 회로의 간소화를 통해서 해상도를 향상시킨 이차원 윤곽 검출용 시각칩 (Vision chip for edge detection with resolution improvement through simplification of unit-pixel circuit)

  • 성동규;공재성;현효영;신장규
    • 센서학회지
    • /
    • 제17권1호
    • /
    • pp.15-22
    • /
    • 2008
  • When designing image sensors including a CMOS vision chip for edge detection, resolution is a significant factor to evaluate the performance. It is hard to improve the resolution of a bio-inspired CMOS vision using a resistive network because the vision chip contains many circuits such as a resistive network and several signal processing circuits as well as photocircuits of general image sensors such as CMOS image sensor (CIS). Low resolution restricts the use of the application systems. In this paper, we improve the resolution through layout and circuit optimization. Furthermore, we have designed a printed circuit board using FPGA which controls the vision chip. The vision chip for edge detection has been designed and fabricated by using $0.35{\mu}m$ double-poly four-metal CMOS technology, and its output characteristics have been investigated.

신경망을 이용한 DNA칩 영상 패턴 분류 알고리즘 (Pattern Classification Algorithm of DNA Chip Image using ANN)

  • 주종태;김대욱;심귀보
    • 한국지능시스템학회논문지
    • /
    • 제16권5호
    • /
    • pp.556-561
    • /
    • 2006
  • DNA칩 영상의 패턴 분류는 인간의 유전적 질병에 대한 유용한 정보를 획득할 수 있다는 점에서 아주 중요한 것이다. 본 논문에서는 DNA칩 영상의 패턴을 분류하기 위해 신경망의 학습 알고리즘 중 Back-propagation과 Self Organizing Map을 이용하여 패턴을 분류하는 알고리즘을 개발하고 이들의 결과를 비교 분석하였다. 또한 개발한 알고리즘은 PC 환경 및 S3C2440 (ARM920T)을 CPU Core로 사용한 MV2440 보드에서 실험하여 그 결과를 디스플레이 함으로써 사용자가 다양한 환경에서 보다 쉽게 유전자 정보를 얻는데 도움을 줄 수 있도록 하였다.

윤곽 검출용 CMOS 시각칩을 이용한 물체 추적 시스템 요소 기술 연구 (Fundamental research of the target tracking system using a CMOS vision chip for edge detection)

  • 현효영;공재성;신장규
    • 센서학회지
    • /
    • 제18권3호
    • /
    • pp.190-196
    • /
    • 2009
  • In a conventional camera system, a target tracking system consists of a camera part and a image processing part. However, in the field of the real time image processing, the vision chip for edge detection which was made by imitating the algorithm of humanis retina is superior to the conventional digital image processing systems because the human retina uses the parallel information processing method. In this paper, we present a high speed target tracking system using the function of the CMOS vision chip for edge detection.

An Automatic Method of Geometric Correction for Landsat Image using GCP Chip Database

  • Hwang, Tae-Hyun;Yun, Young-Bo;Yoon, Geun-Won;Park, Jong-Hyun
    • 대한원격탐사학회:학술대회논문집
    • /
    • 대한원격탐사학회 2003년도 Proceedings of ACRS 2003 ISRS
    • /
    • pp.549-551
    • /
    • 2003
  • Satellite images are utilized for various purposes and many people are concerned about them. But it is necessary to process geometric correction for using of satellite images. However, common user regards geometric correction, which is basic preprocessing for satellite image, as laborious job. Therefore we should provide an automatic geometric correction method for Landsat image using GCP chip database. The GCP chip database is the collection of pieces of images with geoinformation and is provided by XML web service. More specifically, XML web service enables common users to easily use our GCP chip database for their own geometric correcting applications.

  • PDF

수광 회로와 윤곽 검출 회로의 분리를 통한 윤곽 검출용 시각칩의 해상도 향상 (Resolution improvement of a CMOS vision chip for edge detection by separating photo-sensing and edge detection circuits)

  • 공재성;서성호;김상헌;신장규;이민호
    • 센서학회지
    • /
    • 제15권2호
    • /
    • pp.112-119
    • /
    • 2006
  • Resolution of an image sensor is very significant parameter to improve. It is hard to improve the resolution of the CMOS vision chip for edge detection based on a biological retina using a resistive network because the vision chip contains additional circuits such as a resistive network and some processing circuits comparing with general image sensors such as CMOS image sensor (CIS). In this paper, we proved the problem of low resolution by separating photo-sensing and signal processing circuits. This type of vision chips occurs a problem of low operation speed because the signal processing circuits should be commonly used in a row of the photo-sensors. The low speed problem of operation was proved by using a reset decoder. A vision chip for edge detection with $128{\times}128$ pixel array has been designed and fabricated by using $0.35{\mu}m$ 2-poly 4-metal CMOS technology. The fabricated chip was integrated with optical lens as a camera system and investigated with real image. By using this chip, we could achieved sufficient edge images for real application.

CHIP 영상으로부터의 CIF 추출 (CIF Extraction from Chip Image)

  • 김지홍;김남철;정호선
    • 대한전자공학회논문지
    • /
    • 제25권9호
    • /
    • pp.1081-1090
    • /
    • 1988
  • A series of procedures using image processing techniques is presented for extracting layout information fast and automatically from chip images. CIF (caltech intermediate form) is chosen for representing such information. First, line-edges are extracted using a line-edge detector. Then, thinning and noise removal procedures follow. Subsequent procedures are vertex extraction and vertex grouping. Finally, CIF is extracted from the coordinates of the grouped vertices. In this paper, the final process is applied to only metal layer. In experiments, this processing scheme is shown to be very effective in extracting CIF.

  • PDF

One-Chip JPEG 적용을 위한 영상 스크램블링 (Image Scrambling for One-Chip JPEG Applications)

  • 권정익;원치선;김재공
    • 한국정보보호학회:학술대회논문집
    • /
    • 한국정보보호학회 1994년도 종합학술발표회논문집
    • /
    • pp.193-202
    • /
    • 1994
  • In this paper, we investigate possible scrambling methods for the JPEG(Joint Photographic Export Group) still image compression standard. In particular, we compare the conventional line rotation and line permutation methods to the DCT block scrambling in terms of the number of bits to be increased and the easiness of buffer control. Computer simulation results show that the DCT block scrambling method is suitable for both data security and buffer control in one-chip JPEG applications.

  • PDF