• Journal of Information Processing Systems
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• v.12 no.4
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• pp.631-643
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• 2016

Due to the block-based discrete cosine transform (BDCT), JPEG compressed images usually exhibit blocking artifacts. When the bit rates are very low, blocking artifacts will seriously affect the image's visual quality. A bilateral filter has the features for edge-preserving when it smooths images, so we propose an adaptive-weighted bilateral filter based on the features. In this paper, an image-deblocking scheme using this kind of adaptive-weighted bilateral filter is proposed to remove and reduce blocking artifacts. Two parameters of the proposed adaptive-weighted bilateral filter are adaptive-weighted so that it can avoid over-blurring unsmooth regions while eliminating blocking artifacts in smooth regions. This is achieved in two aspects: by using local entropy to control the level of filtering of each single pixel point within the image, and by using an improved blind image quality assessment (BIQA) to control the strength of filtering different images whose blocking artifacts are different. It is proved by our experimental results that our proposed image-deblocking scheme provides good performance on eliminating blocking artifacts and can avoid the over-blurring of unsmooth regions.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.585-593
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• 2017

In this paper, we propose a deblocking filter hardware architecture for low-power HEVC (High-Efficiency Video Coding) in-loop for mobile systems. HEVC performs image compression on a block-by-block basis, resulting in blockage of the image due to quantization error. The deblocking filter is used to remove the blocking phenomenon in the image. Currently, UHD video service is supported in various mobile systems, but power consumption is high. The proposed low-power deblocking filter hardware structure minimizes the power consumption by blocking the clock to the internal module when the filter is not applied. It also has four parallel filter structures for high throughput at low operating frequencies and each filter is implemented in a four-stage pipeline. The proposed deblocking filter hardware structure is designed with Verilog HDL and synthesized using TSMC 65nm CMOS standard cell library, resulting in about 52.13K gates. In addition, real-time processing of 8K@84fps video is possible at 110MHz operating frequency, and operation power is 6.7mW.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.3
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• pp.1700-1721
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• 2017

The problem of blocking artifacts is very common in block-based image and video compression, especially at very low bit rates. In this paper, we propose a post-processing method for JPEG-coded image deblocking via sparse representation and adaptive residual threshold. This method includes three steps. First, we obtain the dictionary by online dictionary learning and the compressed images. The dictionary is then modified by the histogram of oriented gradient (HOG) feature descriptor and K-means cluster. Second, an adaptive residual threshold for orthogonal matching pursuit (OMP) is proposed and used for sparse coding by combining blind image blocking assessment. At last, to take advantage of human visual system (HVS), the edge regions of the obtained deblocked image can be further modified by the edge regions of the compressed image. The experimental results show that our proposed method can keep the image more texture and edge information while reducing the image blocking artifacts.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.830-833
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• 2009

Deblocking Filter (DF) is newly introduced into H.264/AVC to remove blocky artifacts. It improves the picture quality and the improved picture is set to the frame buffer for motion compensation. As a result, higher coding efficiency is achieved by DF. However, if the original image has heavily-slanted patterns, DF removes the edges to be kept because it is applied only perpendicularly to the block boundaries. In this paper, we propose Edge Adaptive Deblocking Filter (EADF) which is applied not only for the perpendicular but also for several slanted directions to deal with the problem. Simulation results showed us that EADF was especially effective for the sequence "Foreman" with PSNR gain of 0.04 dB.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.45 no.4
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• pp.41-49
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• 2008

H.264/AVC supports variable block motion compensation, multiple reference images, 1/4-pixel motion vector accuracy, and in-loop deblocking filter, compared with the existing compression technologies. While these coding technologies are major functions of compression rate improvement, they lead to high complexity at the same time. For the H.264 video coding technology to be actually applied on low-end / low-bit rates terminals more extensively, it is essential to improve tile coding speed. Currently the deblocking filter that can improve the moving picture's subjective image quality to a certain degree is used on low-end terminals to a limited extent due to computational complexity. In this paper, a performance improvement method of the deblocking filter that efficiently reduces the blocking artifacts occurred during the compression of low-bit rates digital motion pictures is suggested. In the method proposed in this paper, the image's spatial correlational characteristics are extracted by using the variable block information of motion compensation; the filtering is divided into 4 modes according to the characteristics, and adaptive filtering is executed in the divided regions. The proposed deblocking method reduces the blocking artifacts, prevents excessive blurring effects, and improves the performance about $30{\sim}40%$ compared with the existing method.

• Journal of IKEEE
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• v.17 no.4
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• pp.418-427
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• 2013

In this paper, we propose a parallel deblocking filter algorithm for H.264/AVC video standard. The deblocking filter has different filter processes according to boundary strength (BS) and each filter process requires various conditional calculations. The order of filtering makes it difficult to parallelize deblocking filter calculations. The proposed deblocking filter algorithm is performed on PRAGRAM which is a 1-D coarse grained reconfigurable architecture (CGRA). Each filter calculation is accelerated using uni-directional pipelined architecture of PRAGRAM. The filter selection and the conditional calculations are efficiently performed using dynamic reconfiguration and conditional reconfiguration. The parallel deblocking filter algorithm uses 225 cycles to process a macroblock and it can process a full HD image at 150 MHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.79-84
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• 2006

This paper proposed a novel H.264 deblocking filter for low-power mobile multimedia SoCs. In H.264 deblocking filter, filtering can be skipped on some pixels when pixel value differences satisfy some specific conditions. Furthermore, whole filtering can be skipped when quantization parameter is less than 16. Based on these features, power consumption can be significantly reduced by shutting down deblocking filter partially or as a whole. The proposed deblocking filter can shut down partial or whole blocks with simple control circuits. Common hardware performs both horizontal filtering and vertical filtering. It was implemented in silicon chip using $0.35{\mu}m$ standard cell library technology. The gate count is about 20,000 gates. The maximum operation frequency is 108MHz. The maximum throughput is 30 frame/s with CCIR601 image format.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.4
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• pp.59-65
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• 2008

This paper proposed a H.264 deblocking filter for the portable low-power multimedia. In H.264 deblocking filter, total 8 input pixels in filtering operations needs own filtering operation process respectively, and each filtering process has common structures for each filtering operation. By sharing common filter coefficients and registers, we have designed and implemented an smaller gated module, and moreover filtering operations are skipped on some or whole pixels what if we use some specific condition to operate filtering modules that need lots of operations. In the core of filtering modules, we achieve 33.31% and 10.85% gate count reduction compared with those of filtering modules of the conventional deblocking filter papers. The proposed low-power deblocking filter is implemented by using samsung 0.35um standard cell library technology, the maximum operationh frequency is 108MHz, and the maximum throughput is 33.03 frames/s with CCIR601 image format.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.46-49
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• 2000

An iterative deblocking algorithm for DCT-compressed images using two-dimensional FIR filters adapted for local directionality of each block, is proposed. First, we introduce a set of simple lowpass filters, which are adapted for edges of different angles. In conventional deblocking methods based on lowpass-filtering and convex projections, a single filter is applied to a whole image. In the proposed method, on the other hand, a suitable filter is chosen out of the directional filters designed previously in every subimage (typically $8{\times}8$ block). Experimental results indicate that adaptive filtering improves PSNR at each iteration.

• The Journal of Korean Association of Computer Education
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• v.13 no.4
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• pp.77-86
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• 2010

In this paper, we propose a real time post-processing visual enhancement technique to reduce the blocking artifacts in block based DCT decoded image for mobile devices that have allocation of the restricted resource. In order to reduce the blocking artifacts effectively even while preserving the image edge to the utmost, the proposed algorithm uses the deblocking filtering or the directional filtering according to the edge detection of the each pixel. After it is discriminated that the pixel to apply the deblocking filtering belongs again to the monotonous area, the weighted average filter with the adaptive mask is applied for the pixel to remove the blocking artifacts. On the other hand, a new directional filter is utilized to get rid of staircase noise and preserve the original edge component. Experimental results show that the proposed algorithm produces better results than those of the conventional algorithms in both subjective and objective qualities.