• 제목/요약/키워드: High-k dielectrics

검색결과 153건 처리시간 0.029초

ITO박막/세라믹유전체 구조의 이동통신 주파수대역용 박형 전파흡수체의 설계 및 제조 (Design and Fabrication of Thin Microwave Absorbers of ITO/Dielectric Structures Used for Mobile Telecommunication Frequency Bands)

  • 윤여춘;김성수
    • 한국재료학회지
    • /
    • 제13권4호
    • /
    • pp.259-265
    • /
    • 2003
  • For the aim of thin microwave absorbers used in mobile telecommunication frequency band, this study proposed a high permittivity dielectrics(λ/4 spacer) coated with ITO thin films of 377 $\Omega$/sq(impedance transformer). High frequency dielectric properties of ferroelectric ceramics, electrical properties of ITO thin films and microwave absorbing properties of ITO/dielectrics were investigated. Ferroelectric materials including $BaTiO_3$(BT), 0.9Pb($Mg_{1}$3/Nb$_{2}$3/)$O_3$-0.1 $PbTiO_3$(PMN-PT), 0.8 Pb (Mg$_{1}$3/$Nb_{2}$3/)$O_3$-0.2 Pb($Zn_{1}$3$_Nb{2}$3/)$O_3$(PMN-PZN) were prepared by ceramic processing for high permittivity dielectrics,. The ferroelectric materials show high dielectric constant and dielectric loss in the microwave frequency range. The microwave absorbance (at 2 ㎓) of BT, 0.9PMN-0.1PT, and 0.8PMN-0.2PZN were found to be 60%(at a thickness of 3.5 mm), 20% (2.5 mm), and 30% (2.5 mm), respectively. By coating the ITO thin films on the ferroelectric substrates with λ/4 thickness, the microwave absorbance is greatly improved. Particularly, when the surface resistance of ITO films is closed of 377 $\Omega$/sq, the reflection loss is reduced to -20 ㏈(99% absorbance). This is attributed to the wave impedance matching controlled by ITO thin films at a given thickness of high permittivity dielectrics of λ/4 (3.5 mm for BT, 2.5 mm for PMN-PT and PMN-PZN at 2 ㎓). It is, therefore, successfully proposed that the ITO/ferroelectric materials with controlled surface resistance and high dielectric constant can be useful as a thin microwave absorbers in mobile telecommunication frequency band.

$ZrO_2$ 게이트 절연막을 이용한 산화물 박막 트랜지스터의 전기적 특성 (Electrical properties of oxide thin film transistor with $ZrO_2$ gate dielectrics)

  • 푸락 천드러 데프낫;이재상;이상렬
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2009년도 제40회 하계학술대회
    • /
    • pp.1334_1335
    • /
    • 2009
  • In this paper we have presented recent studies concerning the high performance oxide thin film transistor (TFT) with a-IGZO channel and $ZrO_2$ gate dielectrics. The a-IGZO TFT is fully fabricated at room-temperature without any thermal treatments. The $ZrO_2$ is one of the most promising high-k materials with high capacitance originated from the high dielectric constant. The a-IGZO TFT with $ZrO_2$ shows high performance exhibiting high field effect mobility of $39.82\;cm^2$/Vs and high on-current of 2.52 mA at 10V.

  • PDF

N형 고분자 반도체의 전하주입 특성 향상을 통한 저전압 유기전계효과트랜지스터 특성 연구 (Low-Voltage Operating N-type Organic Field-Effect Transistors by Charge Injection Engineering of Polymer Semiconductors and Bi-Layered Gate Dielectrics)

  • 문지훈;백강준
    • 한국전기전자재료학회논문지
    • /
    • 제30권10호
    • /
    • pp.665-671
    • /
    • 2017
  • Herein, we report the fabrication of low-voltage N-type organic field-effect transistors by using high capacitance fluorinated polymer gate dielectrics such as P(VDF-TrFE), P(VDF-TrFE-CTFE), and P(VDF-TrFE-CFE). Electron-withdrawing functional groups in PVDF-based polymers typically cause the depletion of negative charge carriers and a high contact resistance in N-channel organic semiconductors. Therefore, we incorporated intermediate layers of a low-k polymerto prevent the formation of a direct interface between PVDF-based gate insulators and the semiconducting active layer. Consequently, electron depletion is inhibited, and the high charge resistance between the semiconductor and source/drain electrodes is remarkably improved by the in corporation of solution-processed charge injection layers.

비선형 유전율의 측정 (Measurement of Nonlinear Dielectric Constant)

  • 노일수;강대하;이상욱;허진석
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2001년도 하계학술대회 논문집 C
    • /
    • pp.1331-1333
    • /
    • 2001
  • In this study a measurement equipment was designed and made for the nonlinear dielectric constants in dielectrics. The determining method of the nonlinear dielectric constants also was proposed. The measurement equipment was consisted of the wave generation part, the high voltage amplifier part, the measurement part and the data acquisition part. In this equipment the measurement control and the data processing could be conducted by computer. In order to determine the nonlinear dielectric constants alternating sign-wave electric fields are applied to dielectrics with different magnitude and the waves of the electric fields and the response from dielectrics are stored in computer memories. The harmonics of dielectric displacement are obtained by the Fourier transformation of these waves. The nonlinear dielectric constants are determined at the relatively low-field region. The experiment for PZT ceramic samples was done by the equipment and the determining method and as the result meaningful data were obtained.

  • PDF

비휘발성 메모리 적용을 위한 $SiO_2/ZrO_2$ 다층 유전막의 전기적 특성 (Electrical characteristic of stacked $SiO_2/ZrO_2$ for nonvolatile memory application as gate dielectric)

  • 박군호;김관수;오준석;정종완;조원주
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
    • /
    • pp.134-135
    • /
    • 2008
  • Ultra-thin $SiO_2/ZrO_2$ dielectrics were deposited by atomic layer chemical vapor deposition (ALCVD) method for non-volatile memory application. Metal-oxide-semiconductor (MOS) capacitors were fabricated by stacking ultra-thin $SiO_2$ and $ZrO_2$ dielectrics. It is found that the tunneling current through the stacked dielectric at the high voltage is lager than that through the conventional silicon oxide barrier. On the other hand, the tunneling leakage current at low voltages is suppressed. Therefore, the use of ultra-thin $SiO_2/ZrO_2$ dielectrics as a tunneling barrier is promising for the future high integrated non-volatile memory.

  • PDF

High performance of ZnO thin film transistors using $SiN_x$ and organic PVP gate dielectrics

  • Kim, Young-Woong;Park, In-Sung;Kim, Young-Bae;Choi, Duck-Kyun
    • 한국결정성장학회지
    • /
    • 제17권5호
    • /
    • pp.187-191
    • /
    • 2007
  • The device performance of ZnO-thin film transistors(ZnO-TFTs) with gate dielectrics of $SiO_2,\;SiN_x$ and Polyvinylphenol(PVP) having a bottom gate configuration were investigated. ZnO-TFTs can induce high device performance with low intrinsic carrier concentration of ZnO only by controlling gas flow rates without additional doping or annealing processes. The field effect mobility and on/off ratio of ZnO-TFTs with $SiN_x$ were $20.2cm^2V^{-1}s^{-1}\;and\;5{\times}10^6$ respectively which is higher than those previously reported. The device adoptable values of the mobility of $1.37cm^2V^{-1}s^{-1}$ and the on/off ratio of $6{\times}10^3$ were evaluated from the device with organic PVP dielectric.

Dry Etching of $Al_2O_3$ Thin Film in Inductively Coupled Plasma

  • Xue, Yang;Um, Doo-Seung;Kim, Chang-Il
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
    • /
    • pp.67-67
    • /
    • 2009
  • Due to the scaling down of the dielectrics thickness, the leakage currents arising from electron tunneling through the dielectrics has become the major technical barrier. Thus, much works has focused on the development of high k dielectrics in both cases of memories and CMOS fields. Among the high-k materials, $Al_2O_3$ considered as good candidate has been attracting much attentions, which own some good properties as high dielectric constant k value (~9), a high bandgap (~2eV) and elevated crystallization temperature, etc. Due to the easy control of ion energy and flux, low ownership and simple structure of the inductively coupled plasma (ICP), we chose it for high-density plasma in our study. And the $BCl_3$ was included in the gas due to the effective extraction of oxygen in the form of BClxOy compound. In this study, the etch characteristic of ALD deposited $Al_2O_3$ thin film was investigated in $BCl_3/N_2$ plasma. The experiment were performed by comparing etch rates and selectivity of $Al_2O_3$ over $SiO_2$ as functions of the input plasma parameters such as gas mixing ratio, DC-bias voltage and RF power and process pressure. The maximum etch rate was obtained under 15 mTorr process perssure, 700 W RF power, $BCl_3$(6 sccm)/$N_2$(14 sccm) plasma, and the highest etch selectivity was 1.9. We used the x-ray photoelectron spectroscopy (XPS) to investigate the chemical reactions on the etched surface. The Auger electron spectroscopy (AES) was used for elemental analysis of etched surface.

  • PDF

The characteristics of Organic Thin Film Transistors with high-k dielectrics

  • Kim, Chang-Su;Kim, Woo-Jin;Jo, Sung-Jin;Baik, Hong-Koo
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
    • /
    • pp.1288-1290
    • /
    • 2005
  • We report on the structural and electrical properties of amorphous Yttria-stabilized zirconia (YSZ) thin films which are the potential high-k gate dielectric material of organic thin film transistor (OTFT). To investigate the influence of the oxygen flow rate on the structural and electrical properties of the YSZ films, XRD, XPS, J-E, I-V were carried out in this work. Oxygen vacancies are expected to be the most predominant type of defect in metal-oxide dielectrics. The leakage current density decreased mainly because of the reduction of oxygen vacancies with increasing oxygen flow rate.

  • PDF

비휘발성 메모리를 위한 $SiO_2/Si_3N_4$ 적층 구조를 갖는 터널링 절연막의 열처리 효과 (Annealing Effects of Tunneling Dielectrics Stacked $SiO_2/Si_3N_4$ Layers for Non-volatile Memory)

  • 김민수;정명호;김관수;박군호;정종완;정홍배;조원주
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
    • /
    • pp.128-129
    • /
    • 2008
  • The annealing effects of $SiO_2/Si_3N_4$ stacked tunneling dielectrics were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_3N_4/SiO_2/Si_3N_4$(NON), $SiO_2/Si_3N_4/SiO_2$(ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS(Metal-Oxide-Semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field and improved electrical characteristics by annealing processes than $SiO_2$ layer.

  • PDF