• ETRI Journal
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• v.27 no.2
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• pp.133-139
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• 2005

A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 ${\mu}$ gate-length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2mm${\times}$ 2mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1mm${\times}$ 2mm. The frequency doubler achieved an output power of -6 dBm at 76.5 GHz with a conversion gain of -16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2mm ${\times}$ 1.2mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W-band.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.80-85
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• 2010

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using metamaterial structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. CRLH structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 5.93 %, 12.83 dB compared with those of conventional Class-F amplifier, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.6 s.121
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• pp.584-590
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• 2007

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using PBG structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. PBG structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 34.64%, 6.65 dB compared with those of conventional Doherty amplifier, respectively.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2690-2692
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• 2003

Amplifier linearity plays a major role in the design of mordern communication systems. An independently controllable AM/AM and AM/PM predistortion linearizers that consists of two bias feed resistance linearizers is proposed. This linearizer allows independent adjustment of the AM/AM and AM/PM curves by using two adjustable voltages to compensate the power amplifier non-linearities. The predistortion linearizer can improve the ACPR by SdB with cdma2000 multi carrier signals. By applying this linearizer to two-tone 880MHz power amplifier, an improvement of adjacent channel leakage power up to 5dBm has been achieved.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.218-222
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• 2008

RF power amplifier requires linearization in order to reduce adjacent channel interference. And most of the existing linearization algorithms assume that a PA has memory-less nonlinearity. But for the wider bandwidth signal, the memory effect of PA cannot be ignored. This paper investigates digital pre-distortion by use of a memory polynomial model which compensates for amplifier nonlinearity and memory effect. The look-up table based implementation scheme is used to reduce the computational complexity of the pre-distortion block. The linearization performance is demonstrated on wideband CDMA signal and class AB high power amplifier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.2
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• pp.308-315
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• 2001

In this paper, a new power amplifier is proposed for reduction of amplified RX band noise signals as well as intermodulation distortion signals using feedforward technique. This power amplifier is implemented for IMT-2000 basestation TX frequency band. Both TX band intermodulation distortion signals and RX band noise signals are reduced by controlling variable attenuator, phase shifter and error amplifier. The proposed power amplifier, which contains two loops-intermodulation distortion signals cancellation loop and RX band noise signals cancellation loop, can provide duplexer with low TX path insertion loss for various wireless communication systems due to choice of loose RX attenuation characteristic. The principle of the proposed amplifier is described graphically based on the conceptual schematic diagram. A two-tone test for power amplifier is done at 2.14GHz with frequency spacing of 5MHz, and RX band rejection test is done over RX full band of 60MHz with 1.95GHz center frequency. Experimental results represent that the cancellation performance of intermodulation distortion signals and RX band noise signals are more than 3 1dB and 21dB, respectively.

• Journal of IKEEE
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• v.24 no.4
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• pp.1093-1097
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• 2020

This work describes the design and characterization of a Ku-band monolithic microwave integrated circuit (MMIC) power amplifier (PA) for satellite communication applications. The device technology used relies on 0.25 ㎛ gate length gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (PHEMT) of wireless information networking (WIN) semiconductor foundry. The developed Ku-band PHEMT MMIC power amplifier has a small-signal gain of 22.2~23.1 dB and saturated output power of 34.8~35.4 dBm over the entire band of 13.75 to 14.5 GHz. Maximum saturated output power is a 35.4 dBm (3.47 W) at 13.75 GHz. Its power added efficiency (PAE) is 30.6~37.83% and the chip dimensions are 4.4 mm×1.9 mm. The developed 3 W PHEMT MMIC power amplifier is expected to be applied in a variety of Ku-band satellite communication applications.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.393-398
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• 2014

A highly efficient dual-mode linear CMOS stacked-FET power amplifier (PA) is implemented for 3G UMTS and 4G LTE handset applications. High efficiency is achieved at a backed-off output power ($P_{out}$) below 12 dBm by employing an active-bypass amplifier, which consumes very low quiescent current and has high load-impedance. The output paths between high- and low-power modes of the PA are effectively isolated by using a bypass switch, thus no RF performance degradation occurs at high-power mode operation. The fabricated 900 MHz CMOS PA using a silicon-on-insulator (SOI) CMOS process operates with an idle current of 5.5 mA and shows power-added efficiency (PAE) of 20.5%/43.5% at $P_{out}$ = 12.4 / 28.2 dBm while maintaining an adjacent channel leakage ratio (ACLR) better than -39 dBc, using the 3GPP uplink W-CDMA signal. The PA also exhibits PAE of 35.1% and $ACLR_{E-UTRA}$ of -33 dBc at $P_{out}$ = 26.5 dBm, using the 20 MHz bandwidth 16-QAM LTE signal.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.469-472
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• 2004

In this paper a current mode sense amplifier suitable for 30nm SONOS flash memories read operation is presented. The proposed sense amplifier employs cross coupled latch type circuit and current mirror to amplify signal from selected memory cell. This sense amplifier provides fast response in low voltage and low current dissipation. Simulation results show the sensing delay time and current dissipation for power supply voltages Vdd to expose limitations of the sense amplifier in various operating conditions.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.1
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• pp.77-88
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• 2000

In this paper, the 3-mode variable gain high power amplifier for a transmitter of INMARSAT-B operating at L-band(1626.5-1646.5 MHz) was developed. This SSPA can amplify 42 dBm in high power mode, 38 dBm in medium power mode and 36 dBm in low power mode for INMARSAT-B. The allowable errol sets +1 dBm as the upper limit and -2 dBm as the lower limit, respectively. To simplify the fabrication process, the whole system is designed by two parts composed of a driving amplifier and a high power amplifier. The HP's MGA-64135 and Motorola's MRF-6401 were used for driving amplifier, and the ERICSSON's PTE-10114 and PTF-10021 for the high power amplifier. The SSPA was fabricated by the RP circuits, the temperature compensation circuits and 3-mode variable gain control circuits and 20 dB parallel coupled-line directional coupler in aluminum housing. In addition, the gain control method was proposed by digital attenuator for 3-mode amplifier. Then il has been experimentally verified that the gain is controlled for single tone signal as well as two tone signals. In this case, the SSPA detects the output power by 20 dB parallel coupled-line directional coupler and phase non-splitter amplifier. The realized SSPA has 41.6 dB, 37.6 dB and 33.2 dB for small signal gain within 20 MHz bandwidth, and the VSWR of input and output port is less than 1.3:1. The minimum value of the 1 dB compression point gets more than 12 dBm for 3-mode variable gain high power amplifier. A typical two tone intermodulation point has 36.5 dBc maximum which is single carrier backed off 3 dB from 1 dB compression point. The maximum output power of 43 dBm was achieved at the 1636.5 MHz. These results reveal a high power of 20 Watt, which was the design target.