• Title/Summary/Keyword: High voltage divider

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Experimental Analysis on Temperature Compensation of Capacitive Voltage Divider for a Pulsed High Voltage Measurement (고전압 펄스신호 측정용 분압기의 온도보상에 관한 실험)

  • Jang, S.D.;Son, Y.G.;Kwon, S.J.;Oh, J.S.;Cho, M.H.
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1530-1533
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    • 2005
  • Total 12 units of high power klystron-modulator systems as microwave source is under operation for 2.5-GeV electron linear accelerator in Pohang Light Source(PLS) linac. RF power and beam power of klystron are precisely measured for the effective control of electron beam. A precise measurement and measurement equipment with good response characteristics are required for this. Input power of klystron is calculated from the applied voltage and the current on its cathode. Tiny measurement error severely effects RF output power value of klystron. Therefore, special care is needed to measure precise beam voltage. Capacitive voltage divider(CVD) unit is intended for the measurement of beam voltage of 400 kV generated from the pulsed klystron-modulator system. Main parameter to determine the standard capacitance in the high arm of CVD is dielectric constant of insulation oil. Therefore CVD should be designed to have a minimum capacitance variation due to voltage, frequency and temperature in the measurement range. This paper will discuss the analysis of capacitive voltage divider for a pulsed high-voltage measurement, and the empirical relations between capacitance and oil temperature variation.

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Compensation of Resistance Variation due to Temperature in Voltage Measurement System (온도에 따른 저항 변화를 보상한 전압 측정 방법)

  • Min, Sang-Jun;Kim, Jin-Sung
    • Journal of the Korean Society for Precision Engineering
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    • v.29 no.11
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    • pp.1174-1177
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    • 2012
  • In voltage measurement by using voltage divider with series resistors, error is generated caused by the variation of resistance. In order to reduce these errors, the hardware cost tends to increase in the previous works. In the proposed method, three resistors are used for the voltage divider of which the organization is adjusted by using switches. Three voltages are measured and the ratio of resistance is calculated based on the measured voltages. Since the resistance ratio is calculated by measuring voltages and additional hardware cost is minimal, the voltage can be measured with high accuracy and low cost. Experimental results show that the mean absolute error is 12.1 mV when the input voltage ranges from 5 V to 50 V.

Capacitive Voltage Divide for a Pulsed High-Voltage Measurement (펄스형 고전압 측정용 용량성 분압기)

  • Jang Sung-Duck;Son Yoon-Kyoo;Kwon Sei-Jin;Oh Jong-Seok;Cho Moo-Hyun
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.2
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    • pp.63-68
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    • 2005
  • Total 12 units of high power klystron-modulator systems as microwave source are under operation for 2.5 GeV electron linear accelerator in Pohang Light Source (PLS) linac. The klystron-modulator system has an important role for the stable operation to improve an availability statistics of overall system performance of klystron-modulator system. RF power and beam power of klystron are precisely measured for the effective control of electron beam. A precise measurement and measurement equipment with good response characteristics are demanded for this. Input power of klystron is calculated from the applied voltage and the current on its cathode. Tiny measurement error severely effects RF output power value of klystron. Therefore, special care is needed to measure precise beam voltage. Capacitive voltage divider (CVD), which divides input voltage as capacitance ratio, is intended for the measurement of a beam voltage of 400 kV generated from the klystron-modulator system. Main parameter to determine standard capacitance in the high arm of CVD is dielectric constant of insulation oil. Therefore CVD should be designed to have a minimum capacitance variation due to voltage, frequency and temperature in the measurement range. This paper will be present and discuss the design concept and analysis of capacitive voltage divider for a pulsed high-voltage measurement, and the empirical relations between capacitance effects and oil temperature variation.

Design of Low voltage High speed Phase Locked Loop (고속 저전압 위상 동기 루프(PLL) 설계)

  • Hwang, In-Ho;Cho, Sang-Bock
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.267-269
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    • 2007
  • PLL(Phase Locked Loop) are widely used circuit technique in modern electronic systems. In this paper, We propose the low voltage and high speed PLL. We design the PFD(Phase Frequency Detector) by using TSPC (True Single Phase Clock) circuit to improve the performance and solve the dead-zone problem. We use CP(Charge Pump} and LP(Loop filter) for Negative feedback and current reusing in order to solve current mismatch and switch mismatch problem. The VCO(Voltage controlled Oscillator) with 5-stage differential ring oscillator is used to exact output frequency. The divider is implemented by using D-type flip flops asynchronous dividing. The frequency divider has a constant division ratio 32. The frequency range of VCO has from 200MHz to 1.1GHz and have 1.7GHz/v of voltage gain. The proposed PLL is designed by using 0.18um CMOS processor with 1.8V supply voltage. Oscillator's input frequency is 25MHz, VCO output frequency is 800MHz and lock time is 5us. It is evaluated by using cadence spectra RF tools.

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The study of test voltage measuring system for high-power testing laboratory (대전력 시험전압 측정방법에 대한 고찰)

  • Roh, Chang-Il;La, Dae-Ryeol;Kim, Sun-Koo;Jung, Heung-Soo;Kim, Won-Man;Lee, Dong-Jun
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1038-1040
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    • 2005
  • This paper describes the optimal design, construction and performance evaluation of voltage divider used in high power testing laboratory for voltage measuring system. These dividers, which are of R, C, R&C type voltage dividers, the voltage to be measured range from voltage to several ten kilovolts, the frequency of the signals has a bandwidth from DC to megaHertz Measuring transient voltage and currents in the high voltage power laboratory is generally accompanied by electromagnetic interface and induced noise. above all, the measuring capabilities of voltage measuring system are dependent upon short response time and it must be as free as possible of inductive effects. In this paper presents both characteristic of voltage divider and design of voltage measuring system.

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A Study of Precision High Voltage Generator for Ion Injection (이온주입용 정밀고압 발생장치 연구)

  • 유동욱;정창용;백주원;조정구;조기연;김학성;원충연
    • Proceedings of the KIPE Conference
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    • 1998.07a
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    • pp.158-161
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    • 1998
  • A precision high voltage generator for ion injection is implemented on HFZVS-PSCI (High Frequency Zero-Voltage-Switching Phase-Shift-Controlled Inverter). Some practical aspects of implementing precision high voltage generator with HFZVS-PSCI, such as a HFHV transformer, multiflier, and precision CR divider are discussed. The results show that the generator under the Phase-Shift-Controller has a fast dynamic response, low ripple voltage, and high accuracy.

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High Performance Wilkinson Power Divider Using Integrated Passive Technology on SI-GaAs Substrate

  • Wang, Cong;Qian, Cheng;Li, De-Zhong;Huang, Wen-Cheng;Kim, Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.8 no.3
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    • pp.129-133
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    • 2008
  • An integrated passive device(IPD) technology by semi-insulating(SI)-GaAs-based fabrication has been developed to meet the ever increasing needs of size and cost reduction in wireless applications. This technology includes reliable NiCr thin film resistor, thick plated Cu/Au metal process to reduce resistive loss, high breakdown voltage metal-insulator-metal(MIM) capacitor due to a thinner dielectric thickness, lowest parasitic effect by multi air-bridged metal layers, air-bridges for inductor underpass and capacitor pick-up, and low chip cost by only 6 process layers. This paper presents the Wilkinson power divider with excellent performance for digital cellular system(DCS). The insertion loss of this power divider is - 0.43 dB and the port isolation greater than - 22 dB over the entire band. Return loss in input and output ports are - 23.4 dB and - 25.4 dB, respectively. The Wilkinson power divider based on SI-GaAs substrates is designed within die size of $1.42\;mm^2$.

Circuit design of an RSFQ counter for voltage standard applications (전압 표준용 RSFQ counter회로의 설계)

  • 남두우;김규태;김진영;강준희
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2003.10a
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    • pp.127-130
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    • 2003
  • An RSFQ (Rapid Single Flux Quantum) counter can be used as a frequency divider that was an essential part of a programmable voltage standard chip. The voltage standard chip is composed of two circuit parts, a counter and an antenna Analog signal of tens to hundreds ㎓ may be applied to a finline antenna part. This analog signal can be converted to the stream of SFQ voltage pulses by a DC/SFQ circuit. The number of voltage pulses can be reduced by 2n times when they pass through a counter that is composed of n T Flip-Flops (Toggle Flip-Flop). Such a counter can be used not only as a frequency divider, but also to build a programmable voltage standard chip. So, its application range can be telecommunication, high speed RAM, microprocessor, etc. In this work, we have used Xic, WRspice, and L-meter to design an RSFQ counter. After circuit optimization, we could obtain the bias current margins of the T Flip-Flop circuit to be above 31% Our RSFQ counter circuit designs were based on the 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology.

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Phase Locked Loop Sub-Circuits for 24 GHz Signal Generation in 0.5μm SiGe HBT technology

  • Choi, Woo-Yeol;Kwon, Young-Woo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.4
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    • pp.281-286
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    • 2007
  • In this paper, sub-circuits for 24 GHz phase locked 100ps(PLLs) using $0.5{\mu}m$ SiGe HBT are presented. They are 24 Ghz voltage controlled oscillator(VCO), 24 GHz to 12 GHz regenerative frequency divider(RFD) and 12 GHz to 1.5 GHz static frequency divider. $0.5{\mu}m$ SiGe HBT technology, which offers transistors with 90 GHz fMAX and 3 aluminum metal layers, is employed. The 24 GHz VCO employed series feedback topology for high frequency operation and showed -1.8 to -3.8 dBm output power within tuning range from 23.2 GHz to 26 GHz. The 24 GHz to 12 GHz RFD, based on Gilbert cell mixer, showed 1.2 GHz bandwidth around 24 GHz under 2 dBm input and consumes 44 mA from 3 V power supply including I/O buffers for measurement. ECL based static divider operated up to 12.5 GHz while generating divide by 8 output frequency. The static divider drains 22 mA from 3 V power supply.

Design of CMOS Dual-Modulus Prescaler and Differential Voltage-Controlled Oscillator for PLL Frequency Synthesizer (PLL 주파수 합성기를 위한 dual-modulus 프리스케일러와 차동 전압제어발진기 설계)

  • Kang Hyung-Won;Kim Do-Kyun;Choi Young-Wan
    • 한국정보통신설비학회:학술대회논문집
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    • 2006.08a
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    • pp.179-182
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    • 2006
  • This paper introduce a different-type voltage-controlled oscillator (VCO) for PLL frequency synthesizer, And also the architecture of a high speed low-power-consumption CMOS dual-modulus frequency divider is presented. It provides a new approach to high speed operation and low power consumption. The proposed circuits simulate in 0.35 um CMOS standard technology.

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