• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.11
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• pp.686-689
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• 2014

Electrostatic discharge has been considered as a major reliability problem in the semiconductor industry. ESD reliability is an important issue for these products. Therefore, each I/O (Input/Output) PAD must be designed with a protection circuitry that creates a low impedance discharge path for ESD current. This paper presents a novel Lateral Insulated Gate Bipolar (LIGBT)-based ESD protection circuit with latch-up immunity and high robustness. The proposed circuit is fabricated by using 0.18 um BCD (bipolar-CMOS-DMOS) process. Also, TLP (transmission line pulse) I-V characteristic of proposed circuit is measured. In the result, the proposed ESD protection circuit has latch-up immunity and high robustness. These characteristics permit the proposed circuit to apply to power clamp circuit. Consequently, the proposed LIGBT-based ESD protection circuit with a latch-up immune characteristic can be applied to analog integrated circuits.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.1
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• pp.93-102
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• 1994

This paper, presents SECRET(SEC REliability Tool), which predicts reliability problems related to the hot-carrier and electromigration effects on the submicron MOSFETs and interconnections. To simulate DC and AC lifetime for hot-carrier damaged devices, we have developed an accurate substrate current model with the geometric sensitivity, which has been verified over the wide ranges of transistor geometries. A guideline can be provided to design hot-carrier resistant circuits by the analysis of HOREL(HOT-carrier RFsistant Logic) effect, and circuit degradation with respect to physical parameter degradation such as the threshold voltage and the mobility can also be expected. In SECRET, DC and AC MTTF values of metal lines are calculated based on lossy transmission line analysis, and parasitic resistances, inductances and capacitances of metal lines are accurately considered when they operate in the condition of high speed. Also, circuit-level reliability simulation can be applied to the determination of metal line width and-that of optimal capacitor size in substrate bias generation circuit. Experimental results obtained from the several real circuits show that SECERT is very useful to estimate and analyze reliability problems.

• Proceedings of the KSR Conference
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• 2000.11a
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• pp.602-609
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• 2000

This study is concerned with analysis and reliability evaluation of LV circuit in Cab Cubicle system which controls train to keep safety in High Speed Train. LV circuit is operated with diagnosis system as safety system. In this paper, we suggest a design and an implementation method to analyze LV circuit or trace fault area in LV circuit. This simulator uses 28 package modules and examines input and output by equations. So, user can trace where is fault area. The implemented system can be expected to be useful for long term test and evaluation of circuit in high speed train systems. We expect reduction to diagnosis area or repair time by this simulator.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.320-323
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• 2005

This paper discusses heat problem of IC, which composes the electronic instruments, to guarantee reliability of electronic instruments. And also proposes the unified equivalent model for various electronic instrument products to guarantee reliability and life of its parts. Because electronic instruments are down sizing and operated with high frequency, the internal temperature of electronic instruments is rising steadily. The internal temperature of the electronic instruments gives a big effect to electronic instrument's reliability and life. The semiconductor parts are the representative heat generation parts because of its complicated function, high frequency and high density. Consequently, guaranteeing reliability and life of electronic semiconductor is the important start point in securing the reliability and life of the electronic instrument product. Unfortunately, there are many factors, which affect heat dissipation efficiency. The heat dissipation efficiency follows the environment where the electronic instrument products are used. Therefore it is very difficult to define reliability and life of the electronic manufactures. Electronic instrument products are composed of printed circuit board (PCB), integrated circuit (IC), resistance, and capacitor and so on. And there are superposed thermal resistances, because the parts are arrayed on the printed circuit board (PCB), Therefore the total thermal resistance is variable. Consequently it cannot have same thermal model for each electronic instrument products. In the next part, we propose the unified equivalent model for various electronic instruments. And using the proposed equivalent model proofs the method for analysis reliability of electronic parts.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.5
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• pp.431-438
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• 2005

In this paper, we propose the built-in current testing circuit for improving reliability As the integrated CMOS circuits in a chip are increased, the testability on design and fabrication should be considered to reduce the cost of testing and to guarantee the reliability In addition, the high degree of integration makes more failures which are different from conventional static failures and introduced by the short between transistor nodes and the bridging fault. The proposed built-in current testing method is useful for detecting not only these failures but also low current level failures and faster than conventional method. In normal mode, the detecting circuit is turned off to eliminate the degradation of CUT(Circuits Under Testing). The differential input stage in detecting circuit prevents the degradation of CUT in test mode. It is expected that this circuit improves the quality of semiconductor products, the reliability and the testability.

• International Journal of Quality Innovation
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• v.2 no.2
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• pp.69-92
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• 2001

The laser-assisted seeding (LAS) process has potential to replace conventional electroless copper plating in Printed Circuit Board (PCB) manufacturing since it combines the steps of laser drilling and plating into one single process. In the LAS process, the single extra LAS step can metallize a microvia. Thus, the process steps can be greatly reduced and the productivity enhanced, but also the high aspect ratio microvias can be metallized. The objectives of this paper are to study the LAS copper thickness within PCB microvias and the thermal reliability of the microvias produced by this process. It was found that results were satisfactory in both the reliability test and also the LAS copper thickness which both comply with IPC standard, the copper thickness produced by the LAS process is sufficient for subsequent electro-plating process. The reliability of the microvias produced by LAS process is acceptable which are free from any voids, corner cracks, and distortion in the plated copper.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.7
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• pp.331-337
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• 2001

With the increasing reliability of analysis schemes and the dramatically increased calculating speed, the computer simulation has become and indispensable process to predict the interruption capacity of circuit breakers. Generally, circuit breakers have to possess both the small current and large current interruption abilities and the circuit breaker designers need to evaluate its capacities to save the time and the expense. The analysis of small current and the large current interruption performances have been considered separately because the phenomena occurring in a interrupter are quite different. To analyze the dielectric recovery after large current interruption many physical phenomena such as heat transfer, convection and arc radiation, the nozzle ablation, the ionization of high temperature SF(sub)6 gas, the electric and themagnetic forces and so forth mush be considered. However, in the analysis of small current interruption performance only the cold gas flow analysis needs to be carried out because the capacitive current is to small that the influence from the current can be neglected. In this paper, an empirical equation which is obtained from a series of tests to estimate the dielectric recovery strength has been applied to a real circuit breaker. The results of analysis have been compared with the test results and the reliability has been investigated.

• Journal of Power Electronics
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• v.15 no.3
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• pp.830-840
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• 2015

The H-bridge inverter is the fundamental power cell of the cascaded distribution static synchronous compensator (DSTATCOM). Thus, cell reliability is important to the compensation performance and stability of the overall system. The concept of the power electronics building block (PEBB) is an ideal solution for the power cell design. In this paper, an H-bridge inverter-based “plug and play” HPEBB is introduced into the main circuit and the controller to improve the compensation performance and reliability of the device. The section that discusses the main circuit primarily emphasizes the design of electrical parameters, physical structure, and thermal dissipation. The section that presents the controller part focuses on the principle of complex programmable logic device -based universal controller This section also analyzes typical reliability and anti-interference issues. The function and reliability of HPEBB are verified by experiments that are conducted on an HPEBB test-bed and on a 10 kV/± 10 Mvar DSTATCOM industrial prototype.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.519-522
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• 2001

Recently, the battery charging technology and reducing technology of harmonics on AC input line are rising importantly according to increasing electrical facilities that it has been replaced battery with emergency power. In this study, I proposed that an auto-charging circuit of battery has low cost with simple-construction circuit, relative, harmonics reduction with diode tap-change method, high reliability of system for using characteristics of thyristor switching. In case of this circuit, convenience and reliability of maintenance of battery power units were more improved. 1 think that it is resulted in effect of prevention to shortening of battery life from over-charging and over-discharging and decrease of harmonics obstacle on AC input line.

• Journal of Electrical Engineering and Technology
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• v.9 no.4
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• pp.1332-1342
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• 2014

This paper proposes a novel test circuit for SiC transistors. On-state resistance under practical application conditions is an important characteristic for the device reliability and conduction efficiency of SiC transistors. In order to measure the on-state resistance in practical applications, high voltage is needed, and high current is also necessary to ignite performance for the devices. A soft-switching circuit based on synchronous buck topology is developed in this paper. To provide high-voltage and high-current stresses for the devices without additional spikes and oscillations, a resonant circuit has been introduced. Using the novel circuit technology, soft-switching can be successfully realized for all the switches. Furthermore, in order to achieve accurate measurement of on-state resistance under switching operations, an active clamp circuit is employed. Operation principle and design analysis of the circuit are discussed. The dynamic measurement method is illustrated in detail. Simulation and experiments were carried out to verify the feasibility of the circuit. A special test circuit has been developed and built. Experimental results confirm that the proposed circuit gives a good insight of the devices performance in real applications.