Yttria-stabilized zirconia (YSZ) has a low thermal conductivity, high thermal expansion coefficient, and excellent mechanical properties; thus, it is used as a thermal barrier coating material for gas turbines. However, during long-time exposure of YSZ to temperatures of 1200℃ or higher, a phase transformation accompanied by a volume change occurs, causing the YSZ coating layer to peel off. To solve this problem, YSZ has been doped with trivalent and tetravalent oxides to obtain coating materials with low thermal conductivity and suppressed phase transformation of zirconia. In this study, YSZ is doped with trivalent oxides, Nd2O3, Yb2O3, Al2O3, and tetravalent oxide, TiO2, and the thermal conductivity of the obtained materials is analyzed according to the composition; furthermore, the relative density change, microstructure change, and m-phase formation behavior are analyzed during long-time heat treatment at high temperatures.
Jeong Min Lee;Dong Seok Cheong;Sung Hyun Kang;Tirtha Raj Acharya;Eun Ha Choi;Weon Ho Shin
Journal of the Korean Institute of Electrical and Electronic Material Engineers
/
v.37
no.4
/
pp.445-450
/
2024
The expansion of lithium-ion battery usage beyond portable electronic devices to electric vehicles and energy storage systems is driven by their high energy density and favorable cycle characteristics. Enhancing the stability and performance of these batteries involves exploring solid electrolytes as alternatives to liquid ones. While sulfide-based solid electrolytes have received significant attention for commercialization, research on amorphous-phase glass solid electrolytes in oxide-based systems remains limited. Here, we investigate the glass transition temperatures and sintering behaviors by changing the molecular ratio of Li2O/B2O3 in borate glass comprising Li2O-B2O3-Al2O3 system. The glass transition temperature is decreasing as increasing the amount of Li2O. When we sintered at 450℃, just above the glass transition temperature, the samples did not consolidate well, while the proper sintered samples could be obtained under the higher temperature. We successfully obtained the borate glass ceramics phases by melt-quenching method, and the sintering characteristics are investigated. Future studies could explore optimizing ion conductivity through refining processing conditions, adjusting the glass former-to-modifier ratio, and incorporating additional Li salt to enhance the ionic conductivity.
Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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2008.11a
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pp.145-145
/
2008
High-k materials have been paid much more attention for their characteristics with high permittivity to reduce the leakage current through the scaled gate oxide. Among the high-k materials, $ZrO_2$ is one of the most attractive ones combing such favorable properties as a high dielectric constant (k= 20 ~ 25), wide band gap (5 ~ 7 eV) as well as a close thermal expansion coefficient with Si that results in good thermal stability of the $ZrO_2$/Si structure. During the etching process, plasma etching has been widely used to define fine-line patterns, selectively remove materials over topography, planarize surfaces, and trip photoresist. About the high-k materials etching, the relation between the etch characteristics of high-k dielectric materials and plasma properties is required to be studied more to match standard processing procedure with low damaged removal process. Among several etching techniques, we chose the inductively coupled plasma (ICP) for high-density plasma, easy control of ion energy and flux, low ownership and simple structure. And the $BCl_3$ was included in the gas due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. During the etching process, the wafer surface temperature is an important parameter, until now, there is less study on temperature parameter. In this study, the etch mechanism of $ZrO_2$ thin film was investigated in function of $Cl_2$ addition to $BCl_3$/Ar gas mixture ratio, RF power and DC-bias power based on substrate temperature increased from $10^{\circ}C$ to $80^{\circ}C$. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by scanning emission spectroscope (SEM). The chemical state of film was investigated using energy dispersive X-ray (EDX).
Kim, Yu-Jeong;Lee, Jin-Hyeon;Park, Gi-Mun;Yu, Bong-Yeong
Proceedings of the Korean Institute of Surface Engineering Conference
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2018.06a
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pp.140-140
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2018
The 3D interconnect technologies have been appeared, as the density of Integrated Circuit (IC) devices increases. Through Silicon Via (TSV) process is an important technology in the 3D interconnect technologies. And the process is used to form a vertically electrical connection through silicon dies. This TSV process has some advantages that short length of interconnection, high interconnection density, low electrical resistance, and low power consumption. Because of these advantages, TSVs could improve the device performance higher. The fabrication process of TSV has several steps such as TSV etching, insulator deposition, seed layer deposition, metallization, planarization, and assembly. Among them, TSV metallization (i.e. TSV filling) was core process in the fabrication process of TSV because TSV metallization determines the performance and reliability of the TSV interconnect. TSVs were commonly filled with metals by using the simple electrochemical deposition method. However, since the aspect ratio of TSVs was become a higher, it was easy to occur voids and copper filling of TSVs became more difficult. Using some additives like an accelerator, suppressor and leveler for the void-free filling of TSVs, deposition rate of bottom could be fast whereas deposition of side walls could be inhibited. The suppressor was adsorbed surface of via easily because of its higher molecular weight than the accelerator. However, for high aspect ratio TSV fillers, the growth of the top of via can be accelerated because the suppressor is replaced by an accelerator. The substitution of the accelerator and the suppressor caused the side wall growth and defect generation. The suppressor was used as Single additive electrodeposition of TSV to overcome the constraints. At the electrochemical deposition of high aspect ratio of TSVs, the suppressor as single additive could effectively suppress the growth of the top surface and the void-free bottom-up filling became possible. Generally, copper was used to fill TSVs since its low resistivity could reduce the RC delay of the interconnection. However, because of the large Coefficients of Thermal Expansion (CTE) mismatch between silicon and copper, stress was induced to the silicon around the TSVs at the annealing process. The Keep Out Zone (KOZ), the stressed area in the silicon, could affect carrier mobility and could cause degradation of the device performance. Cobalt can be used as an alternative material because the CTE of cobalt was lower than that of copper. Therefore, using cobalt could reduce KOZ and improve device performance. In this study, high-aspect ratio TSVs were filled with cobalt using the electrochemical deposition. And the filling performance was enhanced by using the suppressor as single additive. Electrochemical analysis explains the effect of suppressor in the cobalt filling bath and the effect of filling behavior at condition such as current type was investigated.
Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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2009.06a
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pp.105-105
/
2009
$ZrO_2$ is one of the most attractive high dielectric constant (high-k) materials. As integrated circuit device dimensions continue to be scaled down, high-k materials have been studied more to resolve the problems for replacing the EY31conventional $SiO_2$. $ZrO_2$ has many favorable properties as a high dielectric constant (k= 20~25), wide band gap (5~7 eV) as well as a close thermal expansion coefficient with Si that results in good thermal stability of the $ZrO_2/Si$ structure. In order to get fine-line patterns, plasma etching has been studied more in the fabrication of ultra large-scale integrated circuits. The relation between the etch characteristics of high-k dielectric materials and plasma properties is required to be studied more to match standard processing procedure with low damaged removal process. Due to the easy control of ion energy and flux, low ownership and simple structure of the inductively coupled plasma (ICP), we chose it for high-density plasma in our study. And the $BCl_3$ included in the gas due to the effective extraction of oxygen in the form of $BCl_xO_y$ compound In this study, the surface kinetic properties of $ZrO_2$ thin film was investigated in function of Ch addition to $BCl_3/Ar$ gas mixture ratio, RF power and DC-bias power based on substrate temperature. The figure 1 showed the etch rate of $ZrO_2$ thin film as function of gas mixing ratio of $Cl_2/BCl_3/Ar$ dependent on temperature. The chemical state of film was investigated using x-ray photoelectron spectroscopy (XPS). The characteristics of the plasma were estimated using optical emission spectroscopy (OES). Auger electron spectroscopy (AES) was used for elemental analysis of etched surface.
Journal of the Microelectronics and Packaging Society
/
v.25
no.1
/
pp.41-45
/
2018
As the size of semiconductor chip shrinks, the electronic industry has been paying close attention to fan-out wafer level packaging (FO-WLP) as an emerging solution to accommodate high input and output density. FO-WLP also has several advantages, such as thin thickness and good thermal resistance, compared to conventional packaging technologies. However, one major challenge in current FO-WLP manufacturing process is to control wafer warpage, caused by the difference of coefficient of thermal expansion and Young's modulus among the materials. Wafer warpage induces misalignment of chips and interconnects, which eventually reduces product quality and reliability in high volume manufacturing. In order to control wafer warpage, it is necessary to understand the effect of material properties and design parameters, such as chip size, chip to mold ratio, and carrier thickness, during packaging processes. This paper focuses on the effects of thickness of chip and molding compound on 12" wafer warpage after PMC of EMC using finite element analysis. As a result, the largest warpage was observed at specific thickness ratio of chip and EMC.
Lithium ion batteries (LIBs) is a kind of rechargeable secondary battery, developed from lithium battery, lithium ions move between the positive and negative electrodes to realize the charging and discharging of external circuits. Zeolitic imidazolate frameworks (ZIFs) are porous crystalline materials in which organic imidazole esters are cross-linked to transition metals to form a framework structure. In this article, ZIF-67 is used as a sacrificial template to prepare nano porous carbon (NPC) coated cobalt nanoparticles. The final product Co/NPC composites with complete structure, regular morphology and uniform size were obtained by this method. The conductive network of cobalt and nitrogen doped carbon can shorten the lithium ion transport path and present high conductivity. In addition, amorphous carbon has more pores that can be fully in contact with the electrolyte during charging and discharging. At the same time, it also reduces the volume expansion during the cycle and slows down the rate of capacity attenuation caused by structure collapse. Co/NPC composites first discharge specific capacity up to 3115 mA h/g, under the current density of 200 mA/g, circular 200 reversible capacity as high as 751.1 mA h/g, and the excellent rate and resistance performance. The experimental results show that the Co/NPC composite material improves the electrical conductivity and electrochemical properties of the electrode. The cobalt based ZIF-67 as the precursor has opened the way for the design of highly performance electrodes for energy storage and electrochemical catalysis.
Journal of the Microelectronics and Packaging Society
/
v.27
no.1
/
pp.45-54
/
2020
Recently, market demands of miniaturization, high interconnection density, and fine pitch of PCBs continuously keep increasing. Therefore, SLP (substrate like PCB) technology using a modified semi additive process (MSAP) has attracted great attention. In particular, SLP technology is essential for the development of high-capacity batteries and 5G technology for smartphones. In this study, the reliability of the microvia of hybrid SLP, which is made of conventional HDI (high density interconnect) and MSAP technologies, was investigated by experimental and numerical analysis. Through thermal cycling reliability test using IST (interconnect stress test) and finite element numerical analysis, the effects of various parameters such as prepreg properties, thickness, number of layers, microvia size, and misalignment on microvia reliability were investigated for optimal design of SLP. As thermal expansion coefficient (CTE) of prepreg decreased, the reliability of microvia increased. The thinner the prepreg thickness, the higher the reliability. Increasing the size of the microvia hole and the pad will alleviate stress and improve reliability. On the other hand, as the number of prepreg layers increased, the reliability of microvia decreased. Also, the larger the misalignment, the lower the reliability. In particular, among these parameters, CTE of prepreg material has the greatest impact on the microvia reliability. The results of numerical stress analysis were in good agreement with the experimental results. As the stress of the microvia decreased, the reliability of the microvia increased. These experimental and numerical results will provide a useful guideline for design and fabrication of SLP substrate.
Magazine of the Korean Society of Agricultural Engineers
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v.37
no.3_4
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pp.61-71
/
1995
Natural ground is a composite consisted of the three phases of water, air and soil paircies. Among the three components, water as a material is weU understood but soil particles are not in foundation engineering. Especially, weathered granite soil generally shows a large volumetric expansion when they freeze. And, the stability and durability of the soil have shown decreased with repetitive freezing and thawing processes. These unique charcteristics may cause various construction and management problems if the soil is used as a construction material and foundation layers. This project was initiated to investigate the soil's physical and engineering characteristics resulting from freezing and freezing-thawing processes. Research results may be used as a basic data in solving various problems related to the soil's unique characteristics. The following conclusions were obtained: The degree of decomposition of weathered granite soil in Kangwon-do was very different between the West and East sides of the divide of the Dae-Kwan Ryung. Soil particles distributed wide from very coarse to fine particles. Consistency could be predicted with a function of P200 as LL=0.8 P200+20. Permeability ranged from 10-2 to 10-4cm/sec, moisture content from 15 to 20% and maximum dry density from 1.55 to 1.73 g /cmΥ$^3$ By compaction, soil particles easily crushed, D50 of soil particles decreased and specific surface significantly increased. Shear characteristics varied wide depending on the disturbance of soil. Strain characteristics influenced the soil's dynamic behviour. Elastic failure mode was observed if strain was less than 1O-4/s and plastic failure mode was observed if strain was more than 10-2/s. The elastic wave velocity in the soil rapidly increased if dry density became larger than 1.5 g /cm$^3$ and these values were Vp=250, Vg= 150, respectively. Frost heave ratio was the highest around 0 $^{\circ}C$ and the maximum frost heave pressure was observed when deformation ratio was less than 10% which was the stability state of soil freezing. The state had no relation with frost depth. Over freezing process was observed when drainage or suction freezing process was undergone. Drainage freezing process was observed if freezing velocity was high under confined pressure and suction frost process was occurred if the velocity was low under the same confined process.
$Li_4Ti_5O_{12}$ is a promising next-generation anode material for lithium-ion batteries due to excellent cycle life, low irreversible capacity, and little volume expansion during charge-discharge process. However, it has poor charge capacity at high current density due to its low electrical conductivity. To improve this weakness, porous $Li_4Ti_5O_{12}$ was synthesized by sol-gel method with P123 as chelating agent. The physical characteristics of as-prepared sample was investigated by XRD, SEM, and BET analysis, and electrochemical properties were characterized by cycle performance test, cyclic voltammetry (CV), electrochemical impedance spectroscopy (EIS). $Li_4Ti_5O_{12}$ synthesized by 0.01mol ratio of P123/Ti showed most unified particle size, high specific surface area, and relatively high porosity. EIS analysis showed that depressed semicircle size was remarkably reduced, which suggested resistance value in electrode was decreased. Capacity in rate performance showed 178 mAh/g at 0.2C, 170 mAh/g at 0.5C, 110 mA/h at 5C, and 90 mAh/g at 10C. Capacity retention also showed 99% after rate performance.
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