• Title/Summary/Keyword: High Power Dissipation

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Low-voltage high-linear bipolar OTA and its application to IF bandpass Filter (저전압 고선형 바이폴라 OTA와 이를 이용한 IF 대역통과 필터)

  • Chung, Won-Sup;Son, Sang-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.7 s.361
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    • pp.37-44
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    • 2007
  • A low-voltage high-linear bipolar OTA and its application to IF bandpass filter for GSM cellular telephone are presented. The OTA consists of a low-voltage linear transconductor, a translinear current gain cell, and three current mirrors. The bandpass filter is composed of two cascaded identical second-order bandpass filters, which consist of a resistor, a capacitor, and a grounded simulated inductor realized with two OTA's and a grounded capacitor. SPICE simulations using an 8 GHz bipolar transistor-array parameter show that the OTA with a transconductance of 1 mS exhibits a linearity error of less than ${\pm}2%$ over an input voltage range of ${\pm}0.65\;V$ at supply voltages of ${\pm}2.0\;V$. Temperature coefficient of the transconductance is less than $-90ppm/^{\circ}C$. The bandpass filter has a center frequency of 85 MHz and Q-factor of 80. Temperature coefficient of the center frequency is less than $-182ppm/^{\circ}C$. The power dissipation of the filter is 128 mW.

A Range-Scaled 13b 100 MS/s 0.13 um CMOS SHA-Free ADC Based on a Single Reference

  • Hwang, Dong-Hyun;Song, Jung-Eun;Nam, Sang-Pil;Kim, Hyo-Jin;An, Tai-Ji;Kim, Kwang-Soo;Lee, Seung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.2
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    • pp.98-107
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    • 2013
  • This work describes a 13b 100 MS/s 0.13 um CMOS four-stage pipeline ADC for 3G communication systems. The proposed SHA-free ADC employs a range-scaling technique based on switched-capacitor circuits to properly handle a wide input range of $2V_{P-P}$ using a single on-chip reference of $1V_{P-P}$. The proposed range scaling makes the reference buffers keep a sufficient voltage headroom and doubles the offset tolerance of a latched comparator in the flash ADC1 with a doubled input range. A two-step reference selection technique in the back-end 5b flash ADC reduces both power dissipation and chip area by 50%. The prototype ADC in a 0.13 um CMOS demonstrates the measured differential and integral nonlinearities within 0.57 LSB and 0.99 LSB, respectively. The ADC shows a maximum signal-to-noise-and-distortion ratio of 64.6 dB and a maximum spurious-free dynamic range of 74.0 dB at 100 MS/s, respectively. The ADC with an active die area of 1.2 $mm^2$ consumes 145.6 mW including high-speed reference buffers and 91 mW excluding buffers at 100 MS/s and a 1.3 V supply voltage.

Numerical Study on Temporal Evolution of Wind-Wave Spectra (풍파 스펙트럼의 시간발전에 관한 수치 실험)

  • 오병철;이길성
    • Journal of Korean Society of Coastal and Ocean Engineers
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    • v.11 no.1
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    • pp.20-33
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    • 1999
  • The evolution of deep-sea waves is driven by energy input from wind, nonlinear energy transfer between wave components, and dissipation through whitecaps. A comparative study was implemented by the use of two wave models in which only the computation methods of nonlinear wave-wave interactions are different from each other. It was reaffirmed that the nonlinear interaction plays a central role in such phenomena that occurred during the spectral growth of wind-seas as down-shift of the spectral peak frequency, overshoot, undershoot, and formation of self-similar spectrum. Specifically, the directional distribution at high frequencies develops into bimodal form, which is attributed to the nonlinear interactions. As saturation stage is reached, spectral density at high frequencies becomes proportional to negative 4 power to the frequency. Perturbations introduced into the spectrum quickly vanished through the actions of the self-similar mechanism. Thus, the nonlinear transfer has important contribution to the stability of numerical ocean wave models.

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Design of Low Power Optical Channel for DisplayPort Interface (저전력 광채널용 디스플레이포트 인터페이스 설계)

  • Seo, Jun-Hyup;Park, In-Hang;Jang, Hae-Jong;Bae, Gi-Yeol;Kang, Jin-Ku
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.11
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    • pp.58-63
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    • 2013
  • This paper presents a transceiver design for DisplayPort interface using an optical channel. By converting the electronic channel to the optical channel, the DisplayPort's main channel can provide a high-speed data transmission for long distance. The design converting the electronic channel to the optical channel in the main channel and AUX channel of the DisplayPort is presented in this paper. Futhermore, the HPD signal transmission by using AUX channel is proposed. In order to minimize power consumption, this paper also proposed a method of controlling the TX block in the main link. The proposed system is designed by a FPGA and an optical module. The FPGA used 651 ALUT(adaptive look-up table)s, 511 resisters and 324 block memory bits. The maximum operating rate of the FPGA is 250MHz. With the proposed power control scheme, 740mW of power dissipation reduction can be achieved at the main link optical TX module.

Design and fabrication of a high power LED searchlight (고출력 LED 탐조등의 설계 및 제작)

  • Kim, Se-Jin;Kim, Sun-Jae;Ha, Hee-Ju;Kil, Gyung-Suk;Kim, Il-Kwon
    • Journal of Advanced Marine Engineering and Technology
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    • v.38 no.6
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    • pp.737-743
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    • 2014
  • This paper dealt with a retrofit high power LED searchlight to replace conventional 1kW halogen searchlights. The design specification meets KDS 6230-1046-1 and KS V 8469. An optical lens with the beam angle of $6^{\circ}$ was used to meet the luminous intensity of 800,000cd at $0^{\circ}$ in horizontal line. Heat dissipation of the LED searchlight adopted a free air cooling type which does not use a fan or a heat-pipe. From the test results, power consumption of the prototype LED searchlight was 148W which was saved by 85% comparing a halogen searchlight of 1kW. Luminous intensity was 945,000cd at $0^{\circ}$ in horizontal line, satisfying KS V 8469. Luminous efficacy was improved by 4.7 times higher than that of the halogen searchlights. Beam angle, color temperature, and color rendering index(CRI) was $5.4^{\circ}$, 5,500K, and 70, respectively. Surface temperature of the LED searchlight was below $60^{\circ}C$ and surrounding temperature of the SMPS installed inside was below $50^{\circ}C$ which were satisfied with the IEC 60092-306.

The Polymer Bonding for Low-temperature Cu Hybrid Bonding (저온 Cu 하이브리드 본딩을 위한 폴리머 본딩)

  • Ji Hun Kim;Jong Kyung Park
    • Journal of the Microelectronics and Packaging Society
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    • v.31 no.3
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    • pp.1-9
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    • 2024
  • This paper addresses the significance of Cu/Polymer Hybrid Bonding technology in the advancement of semiconductor packaging. As the demands of the AI era increase, the semiconductor industry is exploring heterogeneous integration packaging technologies to achieve high I/O counts, low power consumption, efficient heat dissipation, multifunctionality, and miniaturization. The conventional Cu/SiO2 Hybrid Bonding structure faces limitations such as achieving compatibility with CMP processes to attain surface roughness below 1nm and the occurrence of bonding defects due to particles. However, Cu/Polymer Hybrid Bonding technology, utilizing polymers, is gaining attention as a promising alternative to overcome these challenges. This study focuses on the deposition, patterning, and material properties of polymers essential for Cu/Polymer Hybrid Bonding, highlighting the advantages and potential applications of this technology compared to existing methods. Specifically, the use of polymers with low glass transition temperatures (Tg) is discussed for their benefits in low-temperature bonding processes and improved mechanical properties due to their high coefficients of thermal expansion. Furthermore, the study explores surface property modifications of polymers and the enhancement of bonding mechanisms through plasma treatment. This research emphasizes that Cu/Polymer Hybrid Bonding technology can serve as a critical breakthrough in developing high-performance, low-power semiconductor devices within the industry.

A Study on the Thermo-Flow Analysis of Air Conditioning Electric Compressor Motor System for Hybrid Electric Vehicles (하이브리드 자동차 에어컨용 전동식 압축기 모터 시스템의 열유동 해석 연구)

  • Kim, Sung Chul
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.14 no.2
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    • pp.592-597
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    • 2013
  • The heat generated at the motor and inverter inside the electric compressor of inverter built-in type is mainly cooled by refrigerant and generally, there is not a thermal problem. However, the close relation of heat transfer from the motor and inverter parts to the compression part affects on compressor efficiency. Also, according to the surrounding environment and system operation condition, the increased temperature of the motor and inverter can affect the power density of the motor system, and especially, the inverter may be prevented to operate by the temperature limits. In this study, we performed thermo-flow analysis of electric compressor motor system, and investigated the heat dissipation enhancement of the motor and inverter. The motor part in the operation region of the electric compressor was generally maintained at low temperature and the inverter part at high compressor speed was lower temperature than the temperature limit of $85^{\circ}C$. However, the case of the inverter at low speed harsh condition was in excess of $10^{\circ}C$. Therefore, in order to solve the thermal problem, the heat reduction technology of the motor and inverter is essential as well as the improvement of flow path in the compressor.

Numerical and experimental analysis of aerodynamics and aeroacoustics of high-speed train using compressible Large Eddy Simulation (압축성 대와류모사를 이용한 고속열차의 공력 및 공력소음의 수치적/실험적 분석)

  • Kwongi Lee;Cheolung Cheong;Jaehwan Kim;Minseung Jung
    • The Journal of the Acoustical Society of Korea
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    • v.43 no.1
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    • pp.95-102
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    • 2024
  • Due to technological advances, the cruising speed of high-speed trains is increasing, and aerodynamic noise generated from the flow outside the train has been an important consideration in the design stage. To accurately predict the flow-induced noise, high-resolution generation of sound sources in the near field and low-dissipation of sound propagation in the far field are required. This should be accompanied by a numerical grid and time resolution that can properly consider both temporal and spatial scales for each component of the real high-speed train. To overcome these challenges, this research simultaneously calculates the external flow and acoustic fields of five high-speed train cars of real-scale and at operational running speeds using a threedimensional unsteady Large Eddy Simulation technique. To verify the numerical analysis, the measurements of the wall pressure fluctuation and numerical results are compared. The Ffowcs Williams and Hawking equation is used to predict the acoustic power radiated from the high-speed train. This research is expected to contribute to noise reduction based on the analysis of the aerodynamic noise generation mechanism of high-speed trains.

Design of QDI Model Based Encoder/Decoder Circuits for Low Delay-Power Product Data Transfers in GALS Systems (GALS 시스템에서의 저비용 데이터 전송을 위한 QDI모델 기반 인코더/디코더 회로 설계)

  • Oh Myeong-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.1 s.343
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    • pp.27-36
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    • 2006
  • Conventional delay-insensitive (DI) data encodings usually require 2N+1 wires for transferring N-bit. To reduce complexity and power dissipation of wires in designing a large scaled chip, an encoder and a decoder circuits, where N-bit data transfer can be peformed with only N+l wires, are proposed. These circuits are based on a quasi delay-insensitive (QDI) model and designed by using current-mode multiple valued logic (CMMVL). The effectiveness of the proposed data transfer mechanism is validated by comparisons with conventional data transfer mechanisms using dual-rail and 1-of-4 encodings through simulation at the 0.25 um CMOS technology. In general, simulation results with wire lengths of 4 mm or larger show that the CMMVL scheme significantly reduces delay-power product ($D{\ast}P$) values of the dual-rail encoding with data rate of 5 MHz or more and the 1-of-4 encoding with data rate of 18 MHz or more. In addition, simulation results using the buffer-inserted dual-rail and 1-of-4 encodings for high performance with the wire length of 10 mm and 32-bit data demonstrate that the proposed CMMVL scheme reduces the D*P values of the dual-rail encoding with data rate of 4 MHz or more and 1-of-4 encoding with data rate of 25 MHz or more by up to $57.7\%\;and\;17.9\%,$ respectively.

A Study on the Thermal Flow Analysis for Heat Performance Improvement of a Wireless Power Charger (열 유동해석을 통한 무선충전기 발열 성능 향상에 관한 연구)

  • Kim, Pyeong-Jun;Park, Dong-Kyou
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.7
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    • pp.310-316
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    • 2019
  • In automotive application, customers are demanding high efficiency and various functions for convenience. The demand for these automotive applications is steadily increasing. In this study, it has been studied the analysis of heat flow to improve the PCB(printed circuit board) heating performance of WPC (wireless power charger) recently developed for convenience. The charging performance of the wireless charger has been reduced due to power dissipation and thermal resistance of PCB. Therefore, it has been proposed optimal PCB design, layout and position of electronic parts through the simulation of heat flow analysis and PCB design was analyzed and decided at each design stage. Then, the experimental test is performed to verify the consistency of the analysis results under actual environmental conditions. In this paper, The PCB modeling and heat flow simulation in transient response were performed using HyperLynx Thermal and FloTHERM. In addition, the measurement was performed using infrared thermal imaging camera and used to verify the analysis results. In the final comparison, the error between analysis and experiment was found to be less than 10 % and the heating performance of PCB was also improved.