• Journal of Power Electronics
• /
• 제14권6호
• /
• pp.1197-1207
• /
• 2014

Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.

• Journal of international Conference on Electrical Machines and Systems
• /
• 제1권2호
• /
• pp.79-84
• /
• 2012

In this paper, a three-phase high-voltage converter (HVC), in which the main structure of each phase is composed of a cascaded PWM rectifier (CPR) and cascaded inverter (CI), is studied. A high-voltage grid is the input of the HVC. In order to ensure proper operation of the HVC, the control method should achieve output voltage sharing (OVS) among the rectifiers in the CPR, OVS among the inverters in the CI, and high power factor. Master-slave direct-current control (MDCC) is used to control the CPR. The ability of the control system to prevent interference is strong when using MDCC. The CI is controlled by three-loop control, which is composed of an outer common-output-voltage loop, inner current loops and voltage sharing loops. Simulation results show low total harmonic distortion (THD) in the HVC input currents and good OVS in both the CPR and CI.

• 전자공학회논문지S
• /
• 제35S권9호
• /
• pp.111-117
• /
• 1998

본 논문은 LC공진회로를 이용한 사이크로컨버터의 휴지기간 없는 극성절환 방법에 관한 것이다. 제안한 방법에 따르면 극성절환시 회로단락을 방지하기 위한 휴지기간이 요구되지 않는다. 따라서 제어지연 및 출력전류의 고조파성분이 감소하게 된다. 그리고 제안한 방법은 비순환전류형의 다른 자연전류형 사이크로컨버터에도 확장될 수 있다. 본 논문에서는 휴지기간 없는 극성절환의 스위칭 방법에 대하여 검토하였으며 제안한 방법의 유용성을 확인하기 위하여 LC공진회로를 이용한 사이크로콘버터에 적용실험을 수행하였다.

• 전력전자학회논문지
• /
• 제13권3호
• /
• pp.229-236
• /
• 2008

최근 중대용량의 교류전동기 구동에 다단 H-브릿지 인버터의 적용이 늘어나고 있다. 이 인버터의 주된 장점 중의 하나는 입력전류에 고조파성분이 적다는 것으로 이는 2차측이 다중의 위상이동 권선으로 이루어진 변압기를 사용함으로써 이루어진다. 본 논문은 다단 H-브릿지 인버터에 적용되는 위상이동 변압기의 권선 설계의 기본 방안과 입력전류 고조파의 이론적인 해석을 제시하고 있다. I부에서는 먼저 위상이동변압기의 입출력 전압관계식을 유도하고 위상이동과 변압기 설계와의 관련성에 대하여 서술하고 있다.

• 한국해안해양공학회지
• /
• 제13권2호
• /
• pp.109-121
• /
• 2001

잠재된 평판 방파제가 해수 교환에 미치는 영향을 실험적으로 조사하였고 그 결과를 제시한다. 흐름은 PIV 시스템으로 관측되었으며 조화분석으로부터 분리된 평균 흐름과 파랑 타원이 각각 제시된다. 실험결과, 순환유량은 입사파의 체적플럭스와 밀접한 관계가 있으며 쌍와류가 평판 후면에서 관측되었다. 염료추적에 의하면 평판위에서 발생된 제트류로 인한 난류의 영향으로 유입되는 해수와 항내 오염물질이 상당히 잘 섞이고 있음을 보여주고 있다.

• 한국자동차공학회논문집
• /
• 제22권2호
• /
• pp.107-114
• /
• 2014

This paper applies a compensated low pass filter (LPF) to current measurements for permanent magnet synchronous motor (PMSM) drives. The noise limits the bandwidth of current controllers and has more adverse influences on control performances under the light load condition because of the low signal-to-noise ratio. In order to eliminate the noise sensitivity, this paper proposes a digital LPF with a compensator of gain attenuation and phase delay which are unacceptable in current information for PMSM drives. Characteristics of the proposed LPF are analyzed in comparison with the general LPFs. The compensated LPF is basically designed by the orthogonal property of the measured currents in the ${\alpha}{\beta}$ stationary reference frame. In addition, an implementation issue of the proposed method is discussed. Experimental results using the proposed method show improvements of the current control performance from two perspectives, rapid step responses and reductions of harmonic distortion.

• Journal of the Korean Society for Industrial and Applied Mathematics
• /
• 제17권3호
• /
• pp.139-170
• /
• 2013

We extend a p-hierarchical decomposition of the second degree finite element space of N$\acute{e}$d$\acute{e}$lec for tetrahedral meshes in three dimensions given in [1] to meshes with hexahedral elements, and derive p-hierarchical decompositions of the second degree finite element space of Raviart-Thomas in two dimensions for triangular and quadrilateral meshes. After having proved stability of these subspace decompositions and requiring certain saturation assumptions to hold, we construct a local a posteriori error estimator for fem and bem coupling of a time-harmonic electromagnetic eddy current problem in $\mathbb{R}^3$. We perform some numerical tests to underline reliability and efficiency of the estimator and test its usefulness in an adaptive refinement scheme.

• 조명전기설비학회논문지
• /
• 제28권11호
• /
• pp.68-76
• /
• 2014

This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.

• 전기학회논문지
• /
• 제66권3호
• /
• pp.587-592
• /
• 2017

In the three-phase four-wire low-voltage power distribution equipment, single-phase and three-phase load have been used mainly mixed. Also linear and nonlinear loads have been used together in the same conditions. In a three-phase four-wire distribution line, the current distribution of three-phase linear load is almost constant in each phase during driving or stopping, but the single-phase load is different from each other for each phase in accordance with the operation and stop. So that the voltage unbalance is caused by the current difference of each phase. In the three-phase four-wire distribution system, non-linear load is used with linear load. The presence of single-phase nonlinear loads can produce an increase in harmonic currents in three-phase and neutral line. It can also cause voltage unbalance. In the present study, we analyzed for the voltage unbalance fluctuations by the operation pattern of the single and three-phase linear and non-linear load in three-phase four-wire low voltage distribution system.

• Journal of Electrical Engineering and Technology
• /
• 제12권3호
• /
• pp.1137-1145
• /
• 2017

This paper proposes the dead time effect compensation algorithm using proportional resonant controller in pulse width modulation inverter of motor drive. To avoid a short circuit in the dc link, the dead time of the switch device is surely required. However, the dead time effect causes the phase current distortions, torque pulsations, and degradations of control performance. To solve these problems, the output current including ripple components on the synchronous reference frame and stationary reference frame are analyzed in detail. As a results, the distorted synchronous d-and q-axis currents contain the 6th, 12th, and the higher harmonic components due to the influence of dead time effect. In this paper, a new dead time effect compensation algorithm using proportional resonant controller is also proposed to reduce the output current harmonics due to the dead time and nonlinear characteristics of the switching devices. The proposed compensation algorithm does not require any additional hardware and the offline experimental measurements. The experimental results are presented to demonstrate the effectiveness of the proposed dead time effect compensation algorithm.