• Journal of the Korea Safety Management & Science
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• v.15 no.2
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• pp.63-69
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• 2013

The purposes of this study are to survey stereotypes of control-display relationships for seven principal controls in passenger cars using the paper-pencil and hardware tests, and to examine stereotype strength of the paper-pencil test through comparing the stereotypes for the controls derived by the two methods. Ninety two and 60 college-aged students participated in the paper-pencil test and the real car simulation of the hardware test, respectively. There are dominant motion-directions for all controls in the paper-pencil test, while in the hardware test, there are dominant motion-directions for six controls including head light, high beam, door window, ignition key, door key and door lock controls. The stereotypes of motion-directions for six controls obtained by the paper-pencil test were the same as or similar to those by the hardware test. It was inferred from this that the congruence of the stereotypes by the two methods might be attributed to two simple motion-direction principles of 'clockwise for increase' and 'upward for increase.' Although it is known that the hardware test would be best for obtaining accurate stereotypes between controls and displays, this study implies that if the paper-pencil test is well designed, the paper-pencil test can produce the same results as the hardware test at low cost and without consuming time.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.819-822
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• 1998

The high complexity of digital circuits has changed the digital circuits design mehtods from schemeatic-based to hardware description languages like VHDL, verilog that make hardware faults become more hard to detect. Thus test generation to detect hardware defects is very important part of the design. But most of the test generation methods are gate-level based. In this paper new high-level test generation method to detect stuck-at-faults on gate level is described. This test generation method is independent of synthesis results and reduce the time and efforts for test generation.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.10
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• pp.217-230
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• 2012

This paper propose interacting test programming methods between test equipment and hardware unit to verify function and performance of the hardware unit under test. Proposed test program can minimizes the risk of failures when the unit is mounted on the aircraft by testing and verifying the unit under the worst stress condition. Also, Object oriented design using UML make it easy to apply in other equipments. Test program consists of architecture package and hardware package. Architecture package is in a role for system management, log analysis, message receiving and message analysis. Messages that are used by system management define messages for testing and defined messages is sent and received to test equipment through Ethernet. Hardware package is in a role for hardware management that is needed to be tested and is related to a system. Hardware to be tested is divided into internal test and transmission test. Internal test inspects hardware itself and reports the test results to the test equipment. Transmission test inspects communication device by sending or receiving data. All kinds of test is done in the worst condition of the test unit executing in parallel. Each device is tested at least 482 times and at most 15,003 times about one hour. Test program is utilized in hardware reliability test like as environmental test or EMI test.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.7
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• pp.526-531
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• 2003

Recently, many BIST(Built-in Self Test) schemes have been researched to reduce test time and hardware. But, most BIST schemes about pattern generation are for deterministic pattern generation. In this paper a new pseudo-random BIST scheme is provided to reduce the existing test hardware and keep a reasonable length of test time. Theoretical study demonstrates the possibility of the reduction of the hardware for pseudo-random test with some explanations and examples. Also the experimental results show that in the proposed test scheme the hardware for the pseudo-random test is much less than in the previous scheme and provide comparison of test time between the proposed scheme and the current one.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.610-618
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• 2003

Recently, many deterministic built-in self-test schemes to reduce test time have been researched. These schemes can achieve a good quality test by shortening the whole test process, but require complex algorithms or much hardware. In this paper, a new deterministic BIST scheme is provided that reduces the additional hardware requirements, as well as keeping test time to a minimum. The proposed BIST (Built-In Self-Test) methodology brings about the reduction of the hardware requirements for pseudo-random tests as well. Theoretical study demonstrates the possibility of reducing the hardware requirements for both pseudo-random and deterministic tests, with some explanations and examples. Experimental results show that in the proposed test scheme the hardware requirements for the pseudo-random test and deterministic test are less than in previous research.

• Journal of Korean Association for Spatial Structures
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• v.16 no.4
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• pp.75-82
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• 2016

Building hardware joints are welded in most cases, which have risks of fire and explosion. Besides, the secondary damage of the destruction of the welded parts can be caused by the horizontal displacement of the structure due to earthquake or wind load. This paper compared the horizontal displacement following abilities of welded building hardware and non-welded building hardware. To do this, We conducted actual formation shake table test, and checked on the horizontal displacement following ability of structure by comparing their responses to earthquake load. We made the 2m-high framework to examine the responses of the actually constructed building hardwares, and analyzed the displacement responses of the welded-typed, non-welded-typed, and cruciform bracket building hardwares. We conducted the test by increasing acceleration rate until displacement reached 40mm corresponding to allowable relative story displacement II. The result of the test showed that the building hardware using welding work made cracking and breakage on welded connections of welded building hardware, but non-welded building hardware with no use of welding work and cruciform bracket building hardware make no problem, and that non-welded building hardware is superior to that of the welded building hardware in the horizontal displacement following ability due to earthquake or wind load.

• Journal of Internet of Things and Convergence
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• v.1 no.1
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• pp.33-38
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• 2015

Hardware are developed in various architecture. It is necessary to verifying value of variables in modules generated in each clock cycles for timing simulation. In this paper, a test vector generator in software type generates test vectors for timing simulation of 224-bit ECDSA hardware modules in developing stage. It provides test vectors with GUI format and text file format.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.2
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• pp.755-759
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• 2012

In this paper, it is about random number generator, which is based on hardware is utilized in medical science and game area. The Intel presents guideline of security level about hardware based true random number generator. At hardware based random number generator, the various test items, that are included in test suits as NIST statistical test, FIPS140-1, is applied. In this paper, it experiments about degree extent of randomness variation from filter scheme effects, which is applied in output stream of hardware noise source.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.1139-1143
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• 2003

HILS(Hardware-In-the-Loop Simulation) is a scheme that incorporates hardware components of primary concern in the numerical simulation environment. Due to its advantages over actual vehicle test and pure simulation, HILS is being widely accepted in automotive industries as test benches for vehicle control units. Developed in this study is a HILS system for EHB(Electro-Hydraulic Brake) systems that include a high pressure generator and a valve control system that independently modulates the brake pressures at four wheels. An EHB control logic was tested in the HILS system. Test results under various driving conditions are presented and compared with the VDC logic.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.189-189
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• 2000

A controller test on a sounding rocket using a testbed is discussed in the paper. Because of the high cost and the risk for the flight test the hardware simulation on the ground is performed. In this paper the conventional On/Off Controller is applied to the attitude control of a sounding rocket. The hardware simulation results are compared with those of the software simulation.