DOI QR코드

DOI QR Code

Analysis of Post Processing Characteristics of Random Number Generator based Hardware Noise Source

하드웨어 잡음원 기반의 난수발생기의 사후처리 특성 분석

  • Hong, Jin-Keun (Division of Information Communication, Baekseok University)
  • 홍진근 (백석대학교 정보통신학부)
  • Received : 2011.12.21
  • Accepted : 2012.02.10
  • Published : 2012.02.29

Abstract

In this paper, it is about random number generator, which is based on hardware is utilized in medical science and game area. The Intel presents guideline of security level about hardware based true random number generator. At hardware based random number generator, the various test items, that are included in test suits as NIST statistical test, FIPS140-1, is applied. In this paper, it experiments about degree extent of randomness variation from filter scheme effects, which is applied in output stream of hardware noise source.

본 논문에서는 의학, 게임분야에서 활용되는 하드웨어 기반의 난수 발생기에 관한 것이다. 인텔은 하드웨어 기반 실난수 발생기의 보안성에 대한 가이드라인을 제시한 바 있다. 주로 존슨 열 잡음원을 사용하며, 듀얼 오실레이터나 폰 노이만 수집기를 적용하고 있다. 하드웨어 기반의 난수 발생기는 NIST 통계검정, FIPS140-1을 포함한 다양한 테스트 유형을 적용하고 있다. 본 논문에서는 하드웨어 잡음원의 출력열에 필터링 기법 영향으로부터 난수성 변화 정도를 측정하였다.

Keywords

References

  1. Michal Varchola, FPGA Based True Random Number Generators for Embedded Cryptographic Applications, Thesis of PhD, Technical University of Kosice, 2008.
  2. M. Dichtl and J. Golic, "High-speed true number generation with logic gates only,"in Cryptographic Hardware and Embedded Systems - CHES 2007, Vienna, Austria, September 10-13, 2007, Proceedings, ser. LNCS, vol. 4727. Springer, 2007, pp. 45-61.
  3. V. Fischer, A. Aubert, B. Valtchanov, and N. Bochard, "True random number generators in congurable logic devices,"September 2008, processing.
  4. P. Lacharme, "Post-processing functions for a biased physical random number generator,"in Fast Software Encryption workshop - FSE 2008.
  5. E. Barker and J. Kelsey, "Nist special publication 800-90: Recommendation for random number generation using deterministic random bit generators," National Institute of Standards and Technology (NIST), Computer Security Division Information Technology Laboratory, March 2007.
  6. B. Valtchanov, A. Aubert, F. Bernard, and V. Fischer, "Modeling and observing the jitter in ring oscillators implemented in fpgas,"in The 11-th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Bratislava, April 2008, pp. 158-163.
  7. V. Fischer, F. Bernard, N. Bochard, and M. Varchola, "Enhancing security of ring oscillator based rng implemented in fpga,"in Field-Programable Logic and Applications (FPL), September 2008, pp. 245-250.
  8. Bertocco, M. Narduzzi, C. Paglierani, P. Petri, "A noise model for digitized data," IEEE transactions on Instrumentation and Measurement, Vol.49, Issue 1, pp.83-86, 2000. https://doi.org/10.1109/19.836314
  9. Ada Fort, Fabrizio Cortigiani, Santina Rocchi, Valerio Vignoli, "Very High Speed True Random Noise Generator," Kluwer Academic Publisher. AICSP2003, 34, pp.97-105, 2003.
  10. Ki-Cheol Tae, Jin-Gyun Chung, Dae-Ik Kim, "Noise generation system using DCT," ISCAS 2001, pp.29-32, 2001.
  11. Danger J. L., Ghazel A., Boutillon E., Laamari H., "Efficient FPGA implementation of Gaussian noise generator for communication channel emulation," ICECS2000, Vol.1, pp.366- 369, 2000.
  12. B. Ando, S. Graziani, Stochastic Resonance: Theory and Applications, Kluwer academic publishers, 2000.
  13. Santina Rocchi, Valerio Vignoli, "A Chaotic CMOS true random analog/digital white noise generator," ISCAS1999, pp.463-466, 1999.