• Korean Journal of Materials Research
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• v.14 no.6
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• pp.413-419
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• 2004

Recently, Silicon On Insulator (SOI) devices emerged to achieve better device characteristics such as higher operation speed, lower power consumption and latch-up immunity. Nevertheless, there are many detrimental defects in SOI wafers such as hydrofluoric-acid (HF)-defects, pinhole, islands, threading dislocations (TD), pyramid stacking faults (PSF), and surface roughness originating from quality of buried oxide film layer. Although the number of defects in SOI wafers has been greatly reduced over the past decade, the turn over of high-speed microprocessors using SOI wafers has been delayed because of unknown defects in SOI wafers. A new characterization method is proposed to investigate the crystalline quality, the buried oxide integrity and some electrical parameters of bonded SOI wafers. In this study, major surface defects in bonded SOI are reviewed using HF dipping, Secco etching, Cu-decoration followed by focused ion beam (FIB) and transmission electron microscope (TEM).

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.6 no.4
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• pp.564-570
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• 1996

We have observed the red and blue luminescence from porous silicon (PS) without any rapid thermal oxidation. Aged porous silicon specimens prepared in dilute HF concentration, especially for the short duration of etching, display the increase of the blue band. The measured luminescence decay time at room temperature exhibits a decay time of about 100 ps and shows appreciably faster decay time than that of 20 K. No photoluminescence (PL) peak maximum shift is observed for the blue PL band at 77 K. However, the red PL band shows the blue shift and displays yellow luminescence at 77 K. The origin of red luminescence has some properties related to Si crystallites, whereas blue luminescence seems to be associated other than Si crystallites.

• Journal of the Korean institute of surface engineering
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• v.41 no.5
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• pp.189-193
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• 2008

In this study, we carried out an investigation of the etching characteristics (etch rate, selectivity to $SiO_2$ and $HfO_2$) of TiN thin films in the $CH_4$/Ar inductively coupled plasma. The maximum etch rate of $274\;{\AA}/min$ for TiN thin films was obtained at $CH_4$(80%)/Ar(20%) gas mixing ratio. At the same time, the etch rate was measured as function of the etching parameters such as RF power, Bias power, and process pressure. The X-ray photoelectron spectroscopy analysis showed an efficient destruction of the oxide bonds by the ion bombardment as well as showed an accumulation of low volatile reaction products on the etched surface. Based on these data, the ion-assisted chemical reaction was proposed as the main etch mechanism for the $CH_4$ containing plasmas.

• Clean Technology
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• v.9 no.2
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• pp.57-61
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• 2003

A novel nitric acid-free desmut solution has been developed to remove smut, which is produced from a NaOH etching, on the surface of aluminum alloy metal in metal surface treatment processes. Comparing with the performance of 5% $HNO_3$ desmut solution, the mixed acid solution containing 2% $H_2O_2$, 0.5% HF, and 10% $H_2SO_4$ shows the same effect of smut removal for aluminum alloy samples of A16061 and A15052. To examine the surface alterations of the aluminum samples, in addition, the surface analysis is carried out with scanning electron microscopy (SEM) and electron probe microanalysis (EPMA).

• Current Photovoltaic Research
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• v.5 no.1
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• pp.25-27
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• 2017

Nanoscale textured black silicon has attracted intensive attention due to its great potential as applications in multicrystalline silicon-based solar cells. It absorbs sunlight over a broad range of wavelengths but introduces large recombination centers, non-uniform doping into cell. In this study, we present a metal-assisted chemical etching technique plus alkaline etching process to fabricate nanoscale pyramid structures with optimized condition. To make the structures, silver nanoparticles-loaded mc-Si wafer was submerged into $H_2O_2/HF$ solution first for nanohole texturing the wafer and textured wafer etched again with KOH solution for making nanoscale pyramid structures. The average reflectivity (350-1050 nm) is about 8.42% with anti-reflection coating.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.6
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• pp.458-464
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• 1998

This paper gives characterization of substrate and PZT(53/47) thin film deposited by metalorganic decomposition, which is concerned in deposition process and device fabrication process, to fabricate micro electro mechanical system (MEMS) device with piezoelectric material. The PZT thin films deposited by MOD at 700^{\circ}C$ for 30 minutes had a polycrystallinity, that is, no substrate dependence, while different interface were developed depending on the bottom electrodes. Such a structural variation could influence on not only the properties of the PZT film but also etching process for fabricating MEMS devices. Therefore the electrode structure is a very important factor in the deposition of the PZT film during etching process by HF acid for MEMS device with piezoelectric material. Piezoelectric coefficients of the PZT films on the different substrates were 40 and 80 pm/V at an applied voltage of 4V. Based in these results, it was possible for deposition of the PZT film by MOD to apply MEMS device fabrication process based on piezoelectricity after selection of proper bottom electrode.

• Journal of Integrative Natural Science
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• v.3 no.3
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• pp.153-156
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• 2010

Oxidation behaviors of porous silicon were investigated by the measurement of area of $SiO_2$ vibrational peaks in FT-IR spectra during thermal oxidation of porous silicon at corresponding temperatures. Visible photoluminescent porous silicon samples were obtained from an electrochemical etch of n-type silicon of resistivity between 1-10 ${\Omega}/cm$. The etching solution was prepared by adding an equal volume of pure ethanol to an aqueous solution of HF. The porous silicon was illuminated with a 300 W tungsten lamp for the duration of etch. Etching was carried out as a two-electrode galvanostatic procedure at applied current density of 200 $mA/cm^2$ for 5 min. The porosity of samples prepared was about 80%. After formation of porous silicon, the samples were thermally oxidized at $100^{\circ}C$, $200^{\circ}C$, $300^{\circ}C$, and $400^{\circ}C$, respectively. The growth rate of $SiO_2$ layer of porous silicon was investigated by using FT-IR spectroscopy. The effect of oxidation of porous silicon was presented.

• Korean Journal of Materials Research
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• v.20 no.1
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• pp.25-30
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• 2010

Si nanowire/multiwalled carbon nanotube nanocomposite arrays were synthesized. Vertically aligned Si nanowire arrays were fabricated by Ag nanodendrite-assisted wet chemical etching of n-type wafers using $HF/AgNO_3$ solution. The composite structure was synthesized by formation of a sheath of carbon multilayers on a Si nanowire template surface through a thermal CVD process under various conditions. The results of Raman spectroscopy, scanning electron microscopy, and high resolution transmission electron microcopy demonstrate that the obtained nanocomposite has a Si nanowire core/carbon nanotube shell structure. The remarkable feature of the proposed method is that the vertically aligned Si nanowire was encapsulated with a multiwalled carbon nanotube without metal catalysts, which is important for nanodevice fabrication. It can be expected that the introduction of Si nanowires into multiwalled carbon nanotubes may significantly alter their electronic and mechanical properties, and may even result in some unexpected material properties. The proposed method possesses great potential for fabricating other semiconductor/CNT nanocomposites.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.146-149
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• 2004

Porous silicon(PS) as an excellent light diffuser can be used as an antireflection layer without other antireflection coating(ARC) materials. PS layers were obtained by electrochemical etching(ECE) anodization of silicon wafers in hydrofluoric acid/ethanol/de-ionized(DI) water solution($HF/EtOH/H_2O$). This technique is based on the selective removal of Si atoms from the sample surface forming a layer of PS with adjustable optical, electrical, and mechanical properties. A PS layer with optimal ARC characteristics was obtained in charge density (Q) of 5.2 $C/cm^2$. The weighted reflectance is reduced from 33 % to 4 % in the wavelength between 400 and 1000 nm. The weighted reflectance with optimized PS layers is much less than that obtained with a commercial SiNx ARC on a potassium hydroxide(KOH) pre-textured multi-crystalline silicon(mc-Si) surface.

• Korean Journal of Metals and Materials
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• v.47 no.11
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• pp.748-753
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• 2009

The surface morphology and the surface roughness of n-type SiC induced by wet-treatment using 45% KOH and buffered oxide etchant (BOE-1HF : $6H_2O$) were investigated by atomic force microscopy (AFM). While Si-face of SiC could be etched by alkali solutions such as KOH, acidic solutions such as BOE were hardly able to etch SiC. When the rough SiC samples were used, the surface roughness of etched sample was decreased after wet-treatment regardless of etchant, due to the planarization the of surface by widening of scratches formed by mechanical polishing. It was observed that the initial etching was affected by the energetically unstable sites, such as dangling bond and steps. However, when a relatively smooth sample was used, the surface roughness was rapidly increased after treatment at $180^{\circ}C$ for 1 hr and at room temperature for 4 hr by using KOH solution, resulting from the nano-sized structures such as pores and bumps. This indicates that porous SiC surface can be achieved by using purely chemical treatment.