• Journal of Power Electronics
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• v.11 no.6
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• pp.811-818
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• 2011

Modulation strategies for multilevel inverters have typically focused on synthesizing a desired set of sinusoidal voltage waveforms using a fixed number of dc voltage sources. This makes the average power drawn from different dc voltage sources unequal and time varying. Therefore, the dc voltage sources are unregulated and require that corrective control action be incorporated. In this paper, first two new selections are proposed for determining the dc voltage sources values for asymmetric cascaded multilevel inverters. Then two modulation strategies are proposed for the dc power balancing of these types of multilevel inverters. Using the charge balance control methods, the power drawn from all of the dc sources are balanced except for the dc source used in the first H-bridge. The proposed control methods are validated by simulation and experimental results on a single-phase 21-level inverter.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.3
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• pp.229-236
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• 2008

Recently, multilevel H-bridge inverters have become popular in medium to high power ac drive applications. One of significant advantages of them is low harmonic contents in their input line currents thanks to the transformer with multiple phase-shifted secondary windings. This paper attempts to provide basic guidelines for the design of the phase shifting transformer windings and theoretical analysis of input line current harmonics of H-bridge inverters. The part I provides the derivation of basic relationships between input and output current of the transformer and the relationship between the phase shifting characteristics and design aspects of the transformer.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.3
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• pp.237-245
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• 2008

Recently, multilevel H-bridge inverters have become popular in medium to high power ac drive applications. One of significant advantages of them is low harmonic contents in their input line currents thanks to the transformer with multiple phase-shifted secondary windings. This paper attempts to provide basic guidelines for the design of the phase shifting transformer windings and theoretical analysis of input line current harmonics of H-bridge inverters. The part II is devoted to the analysis of the harmonic characteristics of the input line current, providing mathematical background for the equidistant phase-shifting angle distribution policy for harmonic elimination.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.323-324
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• 2015

Recently, asymmetrical cascaded H-bridge multilevel inverter started to be highlighted as an alternative for the symmetrical cascaded H-bridge. The topology has a small number of part count compared to the symmetrical with higher number of levels. However, it has a drawback of the modulation index limitation which is relatively higher than its symmetrical counterpart, which causes a necessity of an extra voltage pre-regulator. In this paper, the single-sourced pre-regulator is unified with an inner single switch DC/DC converter isolated by coupled inductor. It leads to cost and size reduction. The proposed topology is verified using simulation results.

• Journal of Power Electronics
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• v.17 no.1
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• pp.76-87
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• 2017

Finite-set predictive current control (FS-PCC) is advantageous for power converters due to its high dynamic performance and has received increasing interest in multilevel inverters. Among multilevel inverter topologies, the cascaded H-bridge (CHB) inverter is popular and mature in the industry. However, a main drawback of FS-PCC is its large computational burden, especially for the application of CHB inverters. In this paper, an FS-PCC method based on a deadbeat solution for three-phase zero-common-mode-voltage CHB inverters is proposed. In the proposed method, an inverse model of the load is utilized to calculate the reference voltage based on the reference current. In addition, a cost function is directly expressed in the terms of the voltage errors. An optimal control actuation is selected by minimizing the cost function. In the proposed method, only three instead of all of the control actuations are used for the calculations in one sampling period. This leads to a significant reduction in computations. The proposed method is tested on a three-phase 5-level CHB inverter. Simulation and experimental results show a very similar and comparable control performance from the proposed method compared with the traditional FS-PCC method which evaluates the cost function for all of the control actuations.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.478-487
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• 2003

In this paper, a type and special feature of Multi-level inverter used in medium-voltage and high-capacity motor driver is introduced. Especially, a power quality and structural advantages of H-Bridge Multi-level inverter is described. It presented the specific structure of power circuit, design method, controller composition and PWM techniques of the cascaded H-Bridge Multi-level inverter which is developed. The feasibility of the developed product based on 3,300V lMVA 7-level H-bridge inverter was studied by experiments and we get conclusion that 1)generate of near-sinusoidal output voltage; 2)is low dv/dt at output voltage; 3)reduce the harmonic injection at input; Experiment demonstrate that it is very economical in productivity because of using the existing production technique and examination equipment, and has the reliability and a good maintenance due to the structure of Power Cell unit combination as well as low cost IGBT.

• Journal of Power Electronics
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• v.16 no.2
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• pp.512-521
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• 2016

Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1074-1086
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• 2019

This paper presents the design and implementation of an improved cascaded multilevel inverter topology with asymmetric DC sources. This experimental inverter topology is a stand-alone system with simulations and experiments performed using resistance loads. The topology uses four asymmetric binary DC sources that are independent from each other and one H-bridge. The topology was simulated using PSIM software before an actual prototype circuit was tested. The proposed topology was shown to be very efficient. It was able to generate a smooth output waveform up to 31 levels with only eight switches. The obtained simulation and experimental results are almost identical. In a 1,200W ($48.3{\Omega}$) resistive load application, the THDv and efficiency of the topology were found to be 1.7% and 97%, respectively. In inductive load applications, the THDv values were 1.1% and 1.3% for an inductive load ($R=54{\Omega}$ dan L=146mH) and a 36W fluorescent lamp load with a capacitor connected at the dc bus.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.5
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• pp.376-380
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• 2010

This paper presents a circuit configuration of multilevel inverter to increase the number of output voltage levels by using conventional 5-level inverters connected in series. Most of all it can maximize the number of output voltage levels by employing input voltage sources, which have the power of five. When it synthesizes the same number of output voltage levels, the proposed inverter can save the number of switching devices compared with the conventional cascaded H-bridge cell inverter. So it can reduce the size, cost, power consumption of the system. We implemented computer-aided simulation and experiments for a 25-level inverter employing two 5-level inverters.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.561-565
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• 2001

This paper proposes a new switching scheme of a static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). To improve the un­balanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.