• Title/Summary/Keyword: H-Bridge Inverter

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A study on Characteristics analysis of time sharing type high frequency inverter consisting of half-bridge serial resonant inverter (Half-Bridge형 시분할방식 고주파 공진 인버터의 특성해석에 관한 연구)

  • Cho G. P.;Shin G. H.;Won J. S.;Kim D. H.;Ro C. G.;Sim K. Y.;Bae Y. H.
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.344-347
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    • 2001
  • A high frequency resonant inverter consisting of three unit half-bridge serial resonant inverter used as power source of induction heating at high frequency is presented in this paper. As a output power control strategy, tine-sharing gate control method is applied. The analysis of the proposed circuit is generally described by using the normalized parameters. Also, according to the calculated characteristics value, a method of the circuit design and operating characteristics of the inverter is proposed. This paper proves the validity of theoretical analysis through the experiment. This proposed inverter show that it can be practically used in future as power source system for induction heating application, DC-DC converter etc.

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Efficient switching pattern for cascaded H-bridge multilevel inverter (Cascaded H-bridge 멀티레벨인버터의 효율적인 스위칭 패턴)

  • Kim, Sun-Pil;Jung, Bo-Chang;Kang, Feel-Soon
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1167-1168
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    • 2011
  • 두 대의 동일한 H-bridge 모듈로 구성되는 Cascaded H-bridge 멀티레벨인버터는 출력전압에 5-레벨을 형성할 수 있으며 출력전압의 THD를 개선시키기 위해 PWM 스위칭을 적용할 수 있다. 출력필터 사이즈를 줄이기 위해 PWM 스위칭 주파수를 높일 수 있지만 스위칭 손실이 증가하게 된다. 본 논문에서는 이러한 경우 스위칭 손실을 저감시킬 수 있는 변형된 스위칭 패턴을 제안한다. Cascaded H-bridge 멀티레벨인버터의 특성을 고려하여 하단 H-bridge 모듈의 스위치는 기본 출력전압 레벨을 형성하도록 동작시키며, 상단 H-bridge 모듈 스위칭에 의한 출력값이 기본 전압레벨에 가감되어 PWM 출력전압 형성하도록 동작시킨다. 제안된 스위칭 패턴을 Cascaded H-bridge 멀티레벨인버터에 적용하여 기존 스위칭 방법과 비교 분석한다.

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Generalized Selective Harmonic Elimination Modulation for Transistor-Clamped H-Bridge Multilevel Inverter

  • Halim, Wahidah Abd.;Rahim, Nasrudin Abd.;Azri, Maaspaliza
    • Journal of Power Electronics
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    • v.15 no.4
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    • pp.964-973
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    • 2015
  • This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.

Dead-Time Implementation Method for CHB Inverter Cells (CHB 인버터 셀의 데드타임 구현 방법)

  • Kim, Kyung-Seo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.1
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    • pp.59-65
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    • 2021
  • This study proposes a dead-time implementation method suitable for cell voltage control of a cascaded H-bridge (CHB) inverter. The PWM module of an existing microcontroller cannot generate a maximum voltage due to the dead-time effect when used as the cell controller of the CHB inverter. In the proposed method, the operation method of the PWM module was changed without using the dead time module included in the existing microcontroller, so that the cell output voltage can be increased to the maximum voltage without voltage discontinuity. During the maximum voltage generation period, the full turn-on state can be maintained without unnecessary switching. The validity of the proposed method is confirmed through an experiment.

Design and Development of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks (PEBB 개념을 적용한 H-브릿지 멀티레벨 인버터의 설계 및 개발)

  • Park, Young-Min;Lee, Se-Hyun
    • Proceedings of the KIPE Conference
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    • 2011.07a
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    • pp.320-321
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    • 2011
  • This paper proposes a practical design and development for CHBM inverter based on Power Electronics Building Blocks (PEBB). It is shown that the expansion and modularization characteristics of the CHBM inverter are improved since the individual inverter modules operate more independently, when using the PEBB concept. The proposed design and control methods are described in detail and the validity of the proposed system is verified experimentally in various industrial fields.

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Line Current Characteristics of Multilevel H-Bridge Inverters: Part I - Connection of Input Transformer and Phase Shift Characteristics (다단 H-브릿지 인버터의 입력전류특성 (I) - 입력단 변압기 결선과 위상이동특성)

  • Jeong, Seung-Gi
    • The Transactions of the Korean Institute of Power Electronics
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    • v.13 no.3
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    • pp.229-236
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    • 2008
  • Recently, multilevel H-bridge inverters have become popular in medium to high power ac drive applications. One of significant advantages of them is low harmonic contents in their input line currents thanks to the transformer with multiple phase-shifted secondary windings. This paper attempts to provide basic guidelines for the design of the phase shifting transformer windings and theoretical analysis of input line current harmonics of H-bridge inverters. The part I provides the derivation of basic relationships between input and output current of the transformer and the relationship between the phase shifting characteristics and design aspects of the transformer.

Line Current Characteristics of Multilevel H-Bridge Inverters: Part II - Harmonic Reduction with Multiple Transformer Windings (다단 H-브릿지 인버터의 입력전류특성(II) - 다중 변압기 결선에 의한 고조파 저감)

  • Jeong, Seung-Gi
    • The Transactions of the Korean Institute of Power Electronics
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    • v.13 no.3
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    • pp.237-245
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    • 2008
  • Recently, multilevel H-bridge inverters have become popular in medium to high power ac drive applications. One of significant advantages of them is low harmonic contents in their input line currents thanks to the transformer with multiple phase-shifted secondary windings. This paper attempts to provide basic guidelines for the design of the phase shifting transformer windings and theoretical analysis of input line current harmonics of H-bridge inverters. The part II is devoted to the analysis of the harmonic characteristics of the input line current, providing mathematical background for the equidistant phase-shifting angle distribution policy for harmonic elimination.

A New Photovoltaic System Architecture of Module-Integrated Converter with a Single-sourced Asymmetric Multilevel Inverter Using a Cost-effective Single-ended Pre-regulator

  • Manoharan, Mohana Sundar;Ahmed, Ashraf;Park, Joung-Hu
    • Journal of Power Electronics
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    • v.17 no.1
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    • pp.222-231
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    • 2017
  • In this paper, a new architecture for a cost-effective power conditioning systems (PCS) using a single-sourced asymmetric cascaded H-bridge multilevel inverter (MLI) for photovoltaic (PV) applications is proposed. The asymmetric MLI topology has a reduced number of parts compared to the symmetrical type for the same number of voltage level. However, the modulation index threshold related to the drop in the number of levels of the inverter output is higher than that of the symmetrical MLI. This problem results in a modulation index limitation which is relatively higher than that of the symmetrical MLI. Hence, an extra voltage pre-regulator becomes a necessary component in the PCS under a wide operating bias variation. In addition to pre-stage voltage regulation for the constant MLI dc-links, another auxiliary pre-regulator should provide isolation and voltage balance among the multiple H-bridge cells in the asymmetrical MLI as well as the symmetrical ones. The proposed PCS uses a single-ended DC-DC converter topology with a coupled inductor and charge-pump circuit to satisfy all of the aforementioned requirements. Since the proposed integrated-type voltage pre-regulator circuit uses only a single MOSFET switch and a single magnetic component, the size and cost of the PCS is an optimal trade-off. In addition, the voltage balance between the separate H-bridge cells is automatically maintained by the number of turns in the coupled inductor transformer regardless of the duty cycle, which eliminates the need for an extra voltage regulator for the auxiliary H-bridge in MLIs. The voltage balance is also maintained under the discontinuous conduction mode (DCM). Thus, the PCS is also operational during light load conditions. The proposed architecture can apply the module-integrated converter (MIC) concept to perform distributed MPPT. The proposed architecture is analyzed and verified for a 7-level asymmetric MLI, using simulation results and a hardware implementation.

A multilevel PWM Inverter for Harmonics Reduction (고조파 저감을 위한 다중 레벨 PWM 인버터)

  • Kang, Feel-Soon;Park, Sung-Jun;Kim, Cheol-U
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.11
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    • pp.645-651
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    • 2002
  • In this paper, a multilevel PWM inverter employing a cascaded transformer is presented to reduce the harmonics of output voltage and load currents. The proposed PWM inverter consists of two full-bridge modules and their corresponding transformers. The secondarics of each transformer are series-connected. So continuous output voltage levels can be synthesized from the suitable selection of the turns ratio of trasformer. And it appears an integral ratio to input DC source. Because of the cascaded connection of transformers, output filter inductor is not necessary. The operational principles and analysis are explained, and it is compared with a conventional isolated H-bridge PWM inverter. The validity of proposed multilevel inverter is verified through simulated and experimental waveform and their FFT results.

Dynamic Characteristic Analysis of SSSC Based on Multi-bridge PAM Inverter

  • Han Byung-Moon;Kim Hee-Joong;Baek Seung-Taek
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.539-545
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    • 2001
  • This paper proposes a static synchronous series compensator based on multi-bridge inverter. The proposed system consists of 6 H-bridge modules per phase, which generate 13 pulses for each half period of power frequency. The dynamic characteristic was analyzed by simulations with EMTP code, assuming that it is inserted in the 154-kV transmission line of one-machine-infinite-bus power system. The feasibility of hardware implementation was verified through experimental works using a scaled model. The proposed system does not require a coupling transformer for voltage injection, and has flexibility in expanding the operation voltage by increasing the number of H-bridge modules.

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