• Journal of Power Electronics
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• v.16 no.2
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• pp.399-413
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• 2016

This paper presents a topology for a modular power electronic transformer (PET) and a control scheme. The proposed PET consists of a cascaded H-Bridge rectifier on the primary side, a high-frequency DC/DC conversion cell in the center, and a cascaded H-Bridge inverter on the secondary side. It is practical to use PETs in power systems to reduce the cost, weight and size. A detailed analysis of the structure is carried out by using equivalent circuit. An algorithm to control the voltages of each capacitor and to maintain the power flow in the PET is established. The merits are analyzed and verified in theory, including the bi-directional power flow, variable voltage/frequency and high power factor on the primary side. The experimental results validated the propose structure and algorithm.

• Journal of Power Electronics
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• v.18 no.2
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• pp.522-532
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• 2018

The cascaded H Bridge (CHB) multilevel inverter (MLI) is popular among the classical MLI topologies due to its modularity and reliability. Although space vector modulation (SVM) is the most suitable modulation scheme for MLIs, it has not been used widely in industry due to the higher complexity involved in its implementation. In this paper, a simple and novel generalized SVM algorithm is proposed, which has both reduced time and space complexity. The proposed SVM involves the generalization of both the duty cycle calculation and switching sequence generation for any n-level inverter. In order to generate the gate pulses for an inverter, a generalized switch matrix (SM) for the CHB inverter is also introduced, which further simplifies the algorithm. The algorithm is tested and verified for three-phase, three-level and five-level CHB inverters in simulations and hardware implementation. A comparison of the proposed method with existing SVM schemes shows the superiority of the proposed scheme.

• Journal of Power Electronics
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• v.16 no.2
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• pp.512-521
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• 2016

Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.2
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• pp.74-80
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• 2003

In this paper, a robust two-degree-of-freedom(TDF) the speed control system using $H_{\infty}$ optimization method and real genetic algorithm is proposed for the robust stability and the robust performance in dc servo motor system. This control system composed of feedback and feedforward controller. The feedback(FB) controller with $H_{\infty}$ optimization method is designed for real genetic algorithm that is model matching problem using mixed sensitivity function. The feedforward(FF) controller with $H_{\infty}$optimization method is minimized the error between transfer function of the optimal model and the overall transfer function. The proposed robust two-degree-of-freedom speed control system is simulated to the dc servo motor. By the simulation, feedback controller can obtain the robust stability property and feedforward controller can obtain the robust performance property under modelling error. The performance of the dc servo motor is analyzed by the experiment setting. The validity of the proposed method is verified through being compared with pid(proportional integrated differential)control system design method for the dc servo motor.

• Journal of Electrochemical Science and Technology
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• v.14 no.2
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• pp.174-183
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• 2023

The dye wastewater discharge from the textile industries mainly affects the aquatic environment. Hence, the treatment of this wastewater is essential for a pollutant-free environment. The purpose of this research is to optimize the dye removal efficiency for process influencing independent variables such as pH, electrolysis time (ET), and current density (CD) by using Box-Behnken design (BBD) optimization and Genetic Algorithm (GA) modelling. The electrocoagulation treatment technique was used to treat the synthetically prepared Reactive Black dye solution under batch mode potentiometric operations. The percentage of error for the BBD optimization was significantly greater than for the GA modelling results. The optimum factors determined by GA modelling were CD-59.11 mA/cm², ET-24.17 minutes, and pH-8.4. At this moment, the experimental and predicted dye removal efficiencies were found to be 96.25% and 98.26%, respectively. The most and least predominant factors found by the beta coefficient were ET and pH respectively. The outcome of this research shows GA modeling is a better tool for predicting dye removal efficiencies as well as process influencing factors.

• Journal of applied mathematics & informatics
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• v.28 no.1_2
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• pp.13-30
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• 2010

Let C be a nonempty closed convex subset of a real Hilbert space H. Consider the following iterative algorithm given by $x_0\;{\in}\;C$ arbitrarily chosen, $x_{n+1}\;=\;{\alpha}_n{\gamma}f(W_nx_n)+{\beta}_nx_n+((1-{\beta}_n)I-{\alpha}_nA)W_nP_C(I-s_nB)x_n$, ${\forall}_n\;{\geq}\;0$, where $\gamma$ > 0, B : C $\rightarrow$ H is a $\beta$-inverse-strongly monotone mapping, f is a contraction of H into itself with a coefficient $\alpha$ (0 < $\alpha$ < 1), $P_C$ is a projection of H onto C, A is a strongly positive linear bounded operator on H and $W_n$ is the W-mapping generated by a finite family of nonexpansive mappings $T_1$, $T_2$, ${\ldots}$, $T_N$ and {$\lambda_{n,1}$}, {$\lambda_{n,2}$}, ${\ldots}$, {$\lambda_{n,N}$}. Nonexpansivity of each $T_i$ ensures the nonexpansivity of $W_n$. We prove that the sequence {$x_n$} generated by the above iterative algorithm converges strongly to a common fixed point $q\;{\in}\;F$ := $\bigcap^N_{i=1}F(T_i)\;\bigcap\;VI(C,\;B)$ which solves the variational inequality $\langle({\gamma}f\;-\;A)q,\;p\;-\;q{\rangle}\;{\leq}\;0$ for all $p\;{\in}\;F$. Using this result, we consider the problem of finding a common fixed point of a finite family of nonexpansive mappings and a strictly pseudocontractive mapping and the problem of finding a common element of the set of common fixed points of a finite family of nonexpansive mappings and the set of zeros of an inverse-strongly monotone mapping. The results obtained in this paper extend and improve the several recent results in this area.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.4
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• pp.245-252
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• 2008

In this paper, we propose a new method for improving the H 264 encoding process and motion estimation part. Our approach is a method to reduce the encoding running time through the omission of reference frame in the mode selection process of H 264 and an improvement of SAD computing process. To evaluate the proposed method, we used the H 264 standard image of QCIF size and TIN 4:2:0 format. Experimental results show that proposed SAD algorithm 1 can improve the speed of encoding runnung time by an average of 4.7% with a negligible degradation of PSNR. However, SAD algorithm 2 can improve the speed of encoding runnung time by an average of 9.6% with 0.98dB degradation of PSNR.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.3
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• pp.23-32
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• 2007

The H.264/AVC video coding standard uses rate distortion optimization (RDO) method to improve the compression performance in the intra prediction. The complexity and computational load are increased more than previous standard by using this method, even though this standard selects the best coding mode for the current macroblock. This paper proposes a fast intra mode decision algorithm for H.264/AVC encoder based on dominant edge direction (DED). To apply the idea, this algorithm uses the approximation of discrete cosine transform (DCT) coefficient. By detecting the DED, 3 modes instead of 9 modes are chosen for RDO calculation to decide the best mode in the $4{\times}4$ luma block. As for the $16{\times}16$ luma and $8{\times}8$ chroma block, instead of 4 modes, only 2 modes are searched. Experimental results show that the computation time of the proposed algorithm is decreased to about 72% of the full search method with negligible quality loss.

• The Journal of the Korea Contents Association
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• v.9 no.9
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• pp.1-8
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• 2009

H.264/AVC video coding standard uses the rate distortion optimization method which determines the best coding mode for macroblock(MB) to improve coding efficiency. Whereas RDO selects the best coding mode, it causes the heavy computational burden comparing with previous standards. To reduce the complexity, in this paper, a fast intra prediction mode decision algorithm using directional gradients is proposed. The proposed algorithm is composed of 2-path structure. In the first path, $16{\times}16$ intra prediction mode is determined using directional gradients. In the second path, 3 modes instead of 9 modes are chosen for RDO to decide the best mode for $4{\times}4$ block. Finally, the two modes determined in the two-path decision process are compared to decide the final block mode. Experimental results show that the computation time of the proposed method is decreased to about 77% of the exhaustive mode decision method with negligible quality loss.

• Transactions on Control, Automation and Systems Engineering
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• v.3 no.3
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• pp.139-145
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• 2001

In this paper, we consider the H$_2$(or guaranteed cost control) and H$_{\infty}$ controller design methods for singular(or descriptor) systems with input time delay. Also, a mixed H$_2$and H$_{\infty}$ controller design algorithm is treated by combination of the proposed H$_2$and H$_{\infty}$ controller design method. The sufficient conditions for the existence of controllers and controller design methods are introduced at each Lemma and Theorem. Furthermore, we present optimization problems to get the upper bound of performance measures. The proposed methods are checked by examples.