• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.1
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• pp.66-77
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• 2010

Improvement in breakdown voltage ($BV_{ds}$) and speed of the device are the key issues among the researchers for enhancing the performance of HEMT. Increased speed of the device aspires for shortened gate length ($L_g$), but due to lithographic limitation, shortening $L_g$ below sub-micrometer requires the inclusion of various metal-insulator geometries like T-gate onto the conventional architecture. It has been observed that the speed of the device can be enhanced by minimizing the effect of upper gate electrode on device characteristics, whereas increase in the $BV_{ds}$ of the device can be achieved by considering the finite effect of the upper gate electrode. Further, improvement in $BV_{ds}$ can be obtained by applying field plates, especially at the drain side. The important parameters affecting $BV_{ds}$ and cut-off frequency ($f_T$) of the device are the length, thickness, position and shape of metal-insulator geometry. In this context, intensive simulation work with analytical analysis has been carried out to study the effect of variation in length, thickness and position of the insulator under the gate for various metal-insulator gate geometries like T-gate, $\Gamma$-gate, Step-gate etc., to anticipate superior device performance in conventional HEMT structure.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.120-131
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• 2007

A comprehensive short channel analytical model has been proposed for High Electron Mobility Transistor (HEMT) to obtain higher cut-off frequency maintaining the reliability of the device. The model has been proposed to consider generalized doping variation in the directions perpendicular to and along the channel. The effect of field plates and different gate-insulator geometry (T-gate, etc) have been considered by dividing the area between gate and the high band gap semiconductor into different regions along the channel having different insulator and metal combinations of different thicknesses and work function with the possibility that metal is in direct contact with the high band gap semiconductor. The variation obtained by gate-insulator geometry and field plates in the field and channel potential can be produced by varying doping concentration, metal work-function and gate-stack structures along the channel. The results so obtained for normal device structure have been compared with previous proposed model and numerical method (finite difference method) to prove the validity of the model.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.1
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• pp.18-26
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• 2004

Back-gated silicon-on-insulator MOSFET -a threshold-voltage adjustable device-employs a constant back-gate potential to terminate source-drain electric fields and to provide carrier confinement in the channel. This suppresses shortchannel effects of nano-scale and of high drain biases, while allowing a means to threshold voltage control. We report here a theoretical analysis of this geometry to identify its natural length scales, and correlate the theoretical results with experimental device measurements. We also analyze experimental electrical characteristics for misaligned back-gate geometries to evaluate the influence on transport behavior from the device electrostatics due to the structure and position of the back-gate. The backgate structure also operates as a floating-gate nonvolatile memory (NVRAM) when the back-gate is floating. We summarize experimental and theoretical results that show the nano-scale scaling advantages of this structure over the traditional front floating-gate NVRAM.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.3
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• pp.189-198
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• 2006

A new analytical model has been proposed for predicting the sheet carrier density of Metal insulator Semiconductor High Electron Mobility Transistor (MISHEMT). The model takes into account the non-linear relationship between sheet carrier density and quasi Fermi energy level to consider the quantum effects and to validate it from subthreshold region to high conduction region. Then model has been formulated in such a way that it is applicable to MESFET/HEMT/MISFET with few adjustable parameters. The model can also be used to evaluate the characteristics for different gate insulator geometries like T-gate etc. The model has been extended to forecast the drain current, conductance and high frequency performance. The results so obtained from the analysis show excellent agreement with previous models and simulated results that proves the validity of our model.