• 제목/요약/키워드: Gate line

검색결과 328건 처리시간 0.029초

방전 논리게이트 플라즈마 디스플레이 패널의 논리게이트 방전특성 (Discharge Characteristics of Logic Gate for Discharge Logic Gate Plasma Display Panel)

  • 염정덕
    • 조명전기설비학회논문지
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    • 제19권6호
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    • pp.9-15
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    • 2005
  • 본 연구는 새로 고안된 부정-논리곱 논리기능을 가지는 방전 논리 게이트 플라즈마 디스플레이 패널의 논리 게이트 방전특성을 해석한 것이다. 이 방전 논리 게이트는 방전 경로에 따른 전극사이의 전압을 제어하여 논리 출력을 유도한다. 실험결과 논리 게이트의 방전특성은 두 수직전극에 인가되는 전압들의 상호관계에 영향을 받는다는 것을 알았다. 그리고 대화면 PDP에의 적용 가능성을 검토하기 위하여 전극의 선저항에 의한 방전특성을 평가한 결과, 두 수직전극들의 선저항에 의한 전압강하가 논리 게이트의 방전에 미치는 영향은 미미한 것으로 추론되었다. 실험을 통해 방전 논리 게이트를 구성하는 각 전극들의 펄스전압과 전류제한저항의 최적 값들을 구하였으며 49[V]의 최대동작마진을 얻었다.

스위칭 네트워크와 디지털 접선 장치에서의 CMOS 게이트 어레이 IC 적용 (An Application of CMOS Gate Array Integrated Circuits to Switching Network and Digital Line Concentrator)

  • 박항구;박권철;조용현
    • 대한전자공학회논문지
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    • 제24권4호
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    • pp.652-657
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    • 1987
  • This paper describes an application of CMOS Gate Array Integrated Cricuits to the implementation of three functional units: A Multiplexer, Time Switch, and Demultiplexer in the Switching Network and Digital Line Concentrator of TDX-1 system, which is a fully digital time division electronic switching system in Korea. The application of CMOS Gate Array Integrated Circuits significantly improves the overall system performance in terms of power consumption, cost, size, reliability, and timing margin, etc.

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TFT-LCD 패널의 구동 파형을 위한 파라미터 최적화 설계에 관한 연구 (A Study on Optimizing Parameter for Driving Waveform of TFT-LCD Panel)

  • 하종호;김광태
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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    • pp.2851-2854
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    • 2003
  • The purpose of this paper was to find out the stabilized and effective value of RC-parameter by using PSpice simulation, considering that gate signal voltage can be distorted by RC-delay of signal line. the results of this study were as follows: TFT-LCD with high quality resolution increased the number of gate signal line and this made TFT on-time shorter over-width of signal line to improve the performance of TFT made the electrostatic capacity increase and the time constant higher, making problems and errors. and owing to the decrease of the aperture ratio, an electro optic character of LCD, we must consider the capacity and the condition of production process in deciding the width and the thickness of the gate signal line.

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전력선 통신환경에서의 구동회로 개선에 관한 연구 (A study on the improvement of Drive circuit in the Power Line Communication)

  • 임승하
    • 전자공학회논문지 IE
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    • 제44권4호
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    • pp.30-34
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    • 2007
  • 전력선 통신에서는 전력을 공급하기 위해 설치된 전력선을 통신 매체로 사용하기 때문에 채널 환경이 열악하다고 할 수 있다. 본 논문에서는 원활한 통신을 위해 신호 감쇠를 저감하는 결합기를 적용한 gate 구동회로를 설계하였다. 결합기의 수신 동작과 송신 동작을 등가회로 해석하여 구동회로에 적합한 임피던스를 갖도록 설계하였다. 그 결과 전력선에 연결된 수 많은 전자 제품들의 상호 작용으로 인한 임피던스 변화에 대한 환경을 개선하여 전력선 통신에서의 BER(Bit Error Rate)을 45% 향상하여 더 원활한 통신을 할 수 있도록 하였다.

영상처리에 기반한 게이트 운영시스템 개발 (Development of Gate Operation System Based on Image Processing)

  • 강대성;유영달
    • 한국항만학회지
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    • 제13권2호
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    • pp.303-312
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    • 1999
  • The automated gate operating system is developed in this paper that controls the information of container at gate in the ACT. This system can be divided into three parts and consists of container identifier recognition car plate recognition container deformation perception. We linked each system and organized efficient gate operating system. To recognize container identifier the preprocess using LSPRD(Line Scan Proper Region Detection)is performed and the identifier is recognized by using neural network MBP When car plate is recognized only car image is extracted by using color information of car and hough transform. In the port of container deformation perception firstly background is removed by using moving window. Secondly edge is detected from the image removed characters on the surface of container deformation perception firstly background is removed by using moving window. Secondly edge is detected from the image removed characters on the surface of container. Thirdly edge is fitted into line segment so that container deformation is perceived. As a results of the experiment with this algorithm superior rate of identifier recognition is shown and the car plate recognition system and container deformation perception that are applied in real-time are developed.

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High $f_T$ 30nm Triple-Gate $In_{0.7}GaAs$ HEMTs with Damage-Free $SiO_2/SiN_x$ Sidewall Process and BCB Planarization

  • Kim, Dae-Hyun;Yeon, Seong-Jin;Song, Saegn-Sub;Lee, Jae-Hak;Seo, Kwang-Seok
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권2호
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    • pp.117-123
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    • 2004
  • A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.

대면적 고화질 TFT-LCD의 Feed-through 전압 보상을 위한 Gate Driving 방법 (Gate Driving Methods to Compensate Feed-Through Voltage for Large Size, High Quality TFT-LCD)

  • 정순신;윤영준;박재우;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 추계학술대회 논문집
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    • pp.99-102
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    • 1999
  • In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking. To improve these problems which are caused by the fried-through voltage, we have evaluated new driving methods to reduce the fled-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. And two-gate line driving methods with the optimized gate signals were applied for the cst-on-gate structure pixels. These gate driving methods were better feed-through characteristics than conventional simple gate pulse. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

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Transmission Line Analysis of Accumulation Layer in IEGT

  • Moon, Jin-Woo;Chung, Sang-Koo
    • Journal of Electrical Engineering and Technology
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    • 제6권6호
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    • pp.824-828
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    • 2011
  • Transmission line analysis of the surface a cumulation layer in injection-enhanced gate transistor (IEGT) is presented for the first time, based on per-unit-length resistance and conductance of the surface layer beneath the gate of IEGT. Lateral electric field on the accumulation layer surface, as well as the electron current injected into the accumulation layer, is governed by the well-known wave equation, and decreases as an exponential function of the lateral distance from the cathode. Unit-length resistance and conductance of the layer are expressed in terms of the device parameters and the applied gate voltage. Results obtained from the experiments are consistent with the numerical simulations.

A Study on the Adjusting Output Energy of the $CO_2$ Laser Controlled Directly in AC Power Line

  • Noh, Ki-Kyong;Jeong, Jong-Jin;Chung, Hyun-Ju;Kim, Hee-Je
    • KIEE International Transactions on Electrophysics and Applications
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    • 제5C권4호
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    • pp.152-154
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    • 2005
  • We demonstrate a simple $CO_2$ laser by controlling firing angle of a TRIAC switch in ac power line. The power supply for our laser system switches the voltage of the AC power line (60Hz) directly. The power supply does not need elements such as a rectifier bridge, energy-storage capacitors, or a current-limiting resistor in the discharge circuit. In order to control the laser output power, the pulse repetition rate is adjusted up to 60Hz and the firing angle of TRIAC gate is varied from $45^{circ}$ to $135^{circ}$. A ZCS(Zero Crossing Switch) circuit and a PIC one-chip microprocessor are used to control the gate signal of the TRIAC precisely. The maximum laser output of 40W is obtained at a total pressure of 18 Torr, a pulse repetition rate of 60Hz, and a TRAIC gate firing angle of $90^{circ}$.

Development of Analysis Module for Marine Traffic Information Using PC Camera

  • Moon Serng-Bae;Lee Geun-Sil;Jun Seung-Hwan
    • 한국항해항만학회지
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    • 제29권4호
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    • pp.313-318
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    • 2005
  • Usually marine traffic survey has been conducted by some methods like an ocular observation using portable RADAR, a questionnaire, etc. But these should have expended a lot of manpower and expenses. In this paper, we have developed new observation module which could capture the RADAR image using PC camera simply, and allowed as to track targets on the PC monitor directly. And it has been programmed to make a database of RADAR image, target's track and information, and analyze the marine traffic tendency in various ways like vessel number crossed over gate line, vessel's velocity distribution in gate line, traffic density distribution, etc. We have confirmed that this module could observe and analyze the marine traffic efficiently and economically through several on-the-spot experiments.