• Title/Summary/Keyword: Gate Shape

Search Result 183, Processing Time 0.036 seconds

Fabrication & Properties of Field Emitter Arrays using the Mold Method for FED Application (Mold 법에 의해 제작된 FED용 전계에미터어레이의 특성 분석)

  • ;;;;K. Oura
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2001.07a
    • /
    • pp.347-350
    • /
    • 2001
  • A typical Mold method is to form a gate electrode, a gate oxide, and emitter tip after fabrication of mold shape using wet-etching of Si substrate. In this study, however, new Mold method using a side wall space structure is used in order to make sharper emitter tip with a gate electrode. Using LPCVD(low pressure chemical vapor deposition), a gate oxide and electrode layer are formed on a Si substrate, and then BPSG(Boro phospher silicate glass) thin film is deposited. After, the BPSG thin film is flowed into a mold as high temperature in order to form a sharp mold structure. Next TiN thin film is deposited as a emitter tip substance. The unfinished device with a glass substrate is bonded by anodic bonding techniques to transfer the emitters to a glass substrate, and Si substrate is etched using KOH-deionized water solution. Finally, we made sharp field emitter array with gate electrode on the glass substrate.

  • PDF

Optimization of a Gate Valve using Design of Experiments and the Kriging Based Approximation Model (실험계획법과 크리깅 근사모델에 의한 게이트밸브 최적화)

  • Kang, Jung-Ho;Kang, Jin;Park, Young-Chul
    • Transactions of the Korean Society of Machine Tool Engineers
    • /
    • v.14 no.6
    • /
    • pp.125-131
    • /
    • 2005
  • The purpose of this study is an optimization of gate valve made by forging method instead of welding method. In this study, we propose an optimal shape design to improve the mechanical efficiency of gate valve. In order to optimize more efficiently and reliably, the meta-modeling technique has been developed to solve such a complex problems combined with the DACE (Design and Analysis of Computer Experiments). The DACE modeling, known as the one of Kriging interpolation, is introduced to obtain the surrogate approximation model of the function. Also, we prove reliability of the DACE model's application to gate valve by computer simulations using FEM(Finite Element Method).

Dynamic Characteristic of Truss Type Lift Gate by Model Tests (모형실험에 의한 트러스형 리프트 게이트의 진동 특성)

  • Lee, Seong Haeng;Shin, Dong Wook;Kim, Kyoung Nam;Jung, Kyoung Sup
    • KSCE Journal of Civil and Environmental Engineering Research
    • /
    • v.32 no.6A
    • /
    • pp.337-345
    • /
    • 2012
  • A model test is performed to investigate the dynamic behavior of truss type lift gate which is being constructed by the four major rivers project. The gate dimensioned 40 m in width, 9m in height is scaled with the ratio of 1:25 and is made of acryl panel and supplemented weight by lead in the concrete test flume dimensioned 1.2 m in width, 0.5 m in height and 30m in length. Firstly natural frequencies of the model gate are measured and compared with the numerical results for the calibration. The amplitudes of the vibration are measured under the different gate opening, upstream water level conditions. Also models with bottom angle $20^{\circ}$, $35^{\circ}$ and $50^{\circ}$ are tested and compared to find out a proper shape of bottom structure which minimizes the gate vibration. These test results presents a basic data for the guide manuals of gate management and a design method to reduce the gate vibration of truss type lift gate.

A Study on Breakdown Voltage Improvement of the Trench IGBT by Extending a Gate Oxide Region beneath the Trench Gate (트렌치 케이트 하단의 게이트 산화막 확장을 통한 트렌치 IGBT의 항복전압 향상에 대한 연구)

  • Lee, Jae-In;Kyoung, Sin-Su;Choi, Jong-Chan;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.11a
    • /
    • pp.74-75
    • /
    • 2008
  • TIGBT has some merits which are lower on-state voltage drop and smaller cell pitch, but also has a defect which is relatively lower breakdown voltage in comparison with planar IGBT. This lower breakdown voltage is due to the electric field which is concentrated on beneath the vertical gate. Therefore in this paper, new trench IGBT structure is proposed to improve breakdown voltage In the new proposed structure, a narrow oxide beneath the trench gate edge where the electric field is concentrated is extended into rectangular shape to decrease the electric field. As a result, breakdown voltage is improved to 23%.

  • PDF

Contact Fatigue Life of Rack-Pinion for Small-Sized Sluice Gate (소형 수문용 랙-피니언의 접촉 피로수명)

  • Kwon, Soon-man
    • Journal of the Korean Society of Manufacturing Technology Engineers
    • /
    • v.26 no.3
    • /
    • pp.299-305
    • /
    • 2017
  • Gate-lifting devices in small- to mid-sized sluice gates mostly employ the mechanical roller rack pinion (RRP) system. This RRP system, which consists of a rack-bar and a pinion, transforms a rotation motion into a linear one. The rack-bar has a series of roller trains that mesh with the pinion. In this study, we adopt an exact involute-trochoid tooth profile of the pinion to obtain a higher contact fatigue strength using the profile modification coefficient. Further, we determine the contact forces and investigate Hertz contact stresses to predict the pitting life of the pinion according to varying the shape design parameters. The results indicate that the design fatigue life of an RRP system for sluice gate can be achieved only when the design value of the profile modification coefficient reaches or exceeds a certain level.

Consideration of CCD Gate Structure in the Determination of the Point Spread Function of Yohkoh Soft X-Ray Telescope (SXT)

  • Shin, Jun-Ho;Sakurai, Takashi
    • The Bulletin of The Korean Astronomical Society
    • /
    • v.37 no.1
    • /
    • pp.93.2-93.2
    • /
    • 2012
  • Point Spread Function (PSF) is one of the most important optical characteristics for describing the performance of a telescope. And a concept of subpixelization is inevitable in evaluating the undersampled PSF (Shin and Sakurai 2009). Then, the internal structure of Yohkoh SXT CCD pixel is not uniform: For the top half of pixel area, the X-ray should pass a so-called gate structure where the charges are transferred to an output amplifier. This gate structure shows energy-dependent sensitivity (Tsuneta et al. 1991). For example, for Al-K (8.34 A) X-ray emission, the transmission of the polysilicon gate is about 0.9. Also, for the peak coronal response of the SXT thin filters, around 17 angstrom (0.729 keV), the transmission of the gate is about 0.6, falling off sharply towards longer wavelengths. It should be noted that this spectrally dependent non-uniform response of each CCD pixel will certainly have a noticeable effect on the properties of the PSF at longer wavelengths. Therefore, especially for analyzing the undersampled PSF of low energy source, a careful consideration of non-uniform internal pixel structure is required in determining the shape of the PSF core. The details on the effect of gate structure will be introduced in our presentation.

  • PDF

Fabrication of Field-Emitter Arrays using the Mold Method for FED Applications

  • Cho, Kyung-Jea;Ryu, Jeong-Tak;Kim, Yeon-Bo;Lee, Sang-Yun
    • Transactions on Electrical and Electronic Materials
    • /
    • v.3 no.1
    • /
    • pp.4-8
    • /
    • 2002
  • The typical mold method for FED (field emission display) fabrication is used to form a gate electrode, a gate oxide layer, and emitter tip after fabrication of a mold shape using wet-etching of Si substrate. However, in this study, new mold method using a side wall space structure was developed to make sharp emitter tips with the gate electrode. In new method, gate oxide layer and gate electrode layer were deposited on a Si wafer by LPCVD (low pressure chemical vapor deposition), and then BPSG (Boro phosphor silicate glass) thin film was deposited. After then, the BPSG thin film was flowed into the mold at high temperature in order to form a sharp mold structure. TiN was deposited as an emitter tip on it. The unfinished device was bonded to a glass substrate by anodic bonding techniques. The Si wafer was etched from backside by KOH-deionized water solution. Finally, the sharp field emitter array with gate electrode on the glass substrate was formed.

Process Variation on Arch-structured Gate Stacked Array 3-D NAND Flash Memory

  • Baek, Myung-Hyun;Kim, Do-Bin;Kim, Seunghyun;Lee, Sang-Ho;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.17 no.2
    • /
    • pp.260-264
    • /
    • 2017
  • Process variation effect on arch-structured gate stacked array (GSTAR) 3-D NAND flash is investigated. In case of arch-structured GSTAR, a shape of the arch channel is depending on an alignment of photo-lithography. Channel width fluctuates according to the channel hole alignment. When a shape of channel exceeds semicircle, channel width becomes longer, increasing drain current. However, electric field concentration on tunnel oxide decreases because less electric flux converges into a larger surface of tunnel oxide. Therefore, program efficiency is dependent on the process variation. Meanwhile, a radius of channel holes near the bottom side become smaller due to an etch slope. It also affects program efficiency as well as channel width. Larger hole radius has an advantage of higher drain current, but causes degradation of program speed.

A Gating System Design to Reduce the Gas Porosity for Die Casting Mobile Device (다이캐스팅 모바일 기기의 기공결함 감소를 위한 유동구조 설계)

  • Jang, Jeong Hui;Kim, Jun Hyung;Han, Chul Ho
    • Journal of the Korean Society of Manufacturing Process Engineers
    • /
    • v.20 no.2
    • /
    • pp.86-92
    • /
    • 2021
  • Usually, the die-cast components used in small mobile devices require finishing processes, such as computer numerically controlled coating. In such cases, porosity is the most important defect. The shape of the molten aluminum that passes through the runner and gate in a mold is the one of the factors that influences gas porosity. To define the spurt index, which numerically indicates the shape of molten aluminum after the gate, Reynolds number and Ohnesorge number are used. Before die fabrication, computer-aided engineering analysis is performed to optimize the filling pattern. Finally, X-ray and surface inspection are performed after casting and machining to evaluate how the spurt index affects porosity and other product parameters. Based on the results obtained herein, a new gating system design process is suggested.

Metal Insulator Gate Geometric HEMT: Novel Attributes and Design Consideration for High Speed Analog Applications

  • Gupta, Ritesh;Kaur, Ravneet;Aggarwal, Sandeep Kr;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.10 no.1
    • /
    • pp.66-77
    • /
    • 2010
  • Improvement in breakdown voltage ($BV_{ds}$) and speed of the device are the key issues among the researchers for enhancing the performance of HEMT. Increased speed of the device aspires for shortened gate length ($L_g$), but due to lithographic limitation, shortening $L_g$ below sub-micrometer requires the inclusion of various metal-insulator geometries like T-gate onto the conventional architecture. It has been observed that the speed of the device can be enhanced by minimizing the effect of upper gate electrode on device characteristics, whereas increase in the $BV_{ds}$ of the device can be achieved by considering the finite effect of the upper gate electrode. Further, improvement in $BV_{ds}$ can be obtained by applying field plates, especially at the drain side. The important parameters affecting $BV_{ds}$ and cut-off frequency ($f_T$) of the device are the length, thickness, position and shape of metal-insulator geometry. In this context, intensive simulation work with analytical analysis has been carried out to study the effect of variation in length, thickness and position of the insulator under the gate for various metal-insulator gate geometries like T-gate, $\Gamma$-gate, Step-gate etc., to anticipate superior device performance in conventional HEMT structure.