• 전기학회논문지
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• 제56권4호
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• pp.745-750
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• 2007

In this paper, we propose a new gate modification method using the input vector maximizes the number of gates in WLS within the optimum range of the minimum leakage power. We prove that MLV is not always the optimal solution, and that the leakage power and area can decrease when modifying the gates using the input vector for which the number of gates in WLS is maximized within the optimum range of the minimum leakage power for the circuits applying the IVC technique and gate modification method. Using the proposed method, the gate-level description circuit can be converted to the modified circuit which reduces the leakage power by chip designer, and the modified circuit can be applied without any modification in design flow.

• 한국조경학회지
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• 제33권2호
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• pp.92-99
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• 2005

The main gate of a university is a element of landscape which improves the quality of campus as well as demarcates the boundary and publicizes the image of university. Therefore, each university strives to differentiate its main gate from that of other universities with a unique form. This research investigates the signs and symbols shown at the university's main gate of 18 universities in Korea, and also presents useful design tips with the objective of bearing the spirit of the campus and its founding ideology. The results of this research as follows: Icons of Sign for 18 universities can be classified into five separate categories: things, human, animal, character, and metaphor. Examples of the 'things' icons include a pen nib, the sun, the cross, a big bell, and so on. Also, the meaning of the represented symbols can be grouped in three separate categories: university's development, contribution to society, and mining of knowledge. From the three category, university development symbol is the most likely to be used.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.322-325
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• 2002

In this study, noise figures of 0.3 $\mu\textrm{m}$-GaAs MESFETs are predicted experimentally with different temperatures. Both the noise figure and the gate leakage current are obtained with wide range of temperatures(27$^{\circ}C$∼300$^{\circ}C$). From the results, gate leakage current increases with temperatures. It is expected that gate leakage current contributes directly to the increase of shot noise current. It is therefore highly recommended to apply an accurate noise analysis to the design of the devices and modules at high temperatures. Fini,Uy the relation between the gate currents resulting in the increase of noise and the noise figures of submicron GaAs MESFETs are traced with different temperatures

• 전기학회논문지
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• 제58권8호
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• pp.1580-1584
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• 2009

We have theoretically analyzed the monolithic integration of vertical cavity lasers with depleted optical thyristor (VCL-DOT) structure and experimentally demonstrated optical logic gates such as AND-gate, OR-gate, and INVERTER implemented by VCL-DOT for an optical programmable gate array. The optical AND and OR gates have been realized by changing a input bias of the single VCL-DOTs and all kinds of optical logic functions are also implemented by adjusting an intensity of the reference input beams into the differential VCL-DOTs. To achieve the high sensitivity, high slope efficiency and low threshold current, a small active region of lasing part and a wide detecting area are simultaneously designed by using a selective oxidation process. The fabricated devices clearly show nonlinear s-shaped current-voltage characteristics and lasing characteristics of a low threshold current with 0.65 mA and output spectrum at 854 nm.

• Transactions on Electrical and Electronic Materials
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• 제17권1호
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• pp.50-55
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• 2016

In this paper, we have analyzed the electrical characteristics of 1200V trench gate field stop IGBT and have compared to NPT planar type IGBT and NPT planar field stop IGBT. As a result of analyzing, we obtained superior electrical characteristics of trench gate field stop IGBT than conventional IGBT. To begin with, the breakdown voltage characteristic was showed 1,460 V and on state voltage drop was showed 0.7 V. We obtained 3.5 V threshold voltage, too. To use these results, we have extracted optimal design and process parameter and designed trench gate field stop IGBT. The designed trench gate IGBT will use to inverter of renewable energy and automotive industry.

• ETRI Journal
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• 제42권6호
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• pp.912-921
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• 2020

Quantum-dot cellular automata (QCA) is an alternative complementary metal-oxide-semiconductor (CMOS) technology that is used to implement high-speed logical circuits at the atomic or molecular scale. In this study, an optimal 2-to-4 decoder in QCA is presented. The proposed QCA decoder is designed using a new formulation based on the MV32 gate. Notably, the MV32 gate has three inputs and two outputs, which is equivalent two 3-input majority gates, and operates based on cellular interactions. A multilayer design is suggested for the proposed decoder. Subsequently, a new and efficient 3-to-8 QCA decoder architecture is presented using the proposed 2-to-4 QCA decoder. The simulation results of the QCADesigner 2.0.3 software show that the proposed decoders perform well. Comparisons show that the proposed 2-to-4 QCA decoder is superior to the previously proposed ones in terms of cell count, occupied area, and delay.

• 대한건축학회논문집:계획계
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• 제34권5호
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• pp.109-118
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• 2018

Noryang Temporary Palace was a place where king Jeongjo (1752-1800) would have lunch after crossing the Temporary Palace River on his way to Hwaseong Temporary Palace to worship at Hyeonryungwon, the tomb of his father, Sadoseja. The government offices in charge of ship bridge construction 'Jugyosa' and 'Byeoljangso' were located in the Temporary Palace. The central buildings of the Haenggung Palace, which ranged up to Yongyangbongjeojeong, were arranged to observe both 'Jugyosa' and 'Byeoljangso' from the Temporary Palace by lifting the ground from Sammun Gate to Yongyangbongjeojeong. Yongyangbongjeojeong, the center of Noryang Temporary Palace, features the style of royal palace architecture and functions of housing architecture. The 'Jugyosa' and 'Byeoljangso' buildings had eight quarters. According to the records, in addition, 15 wood sheds, 5 rice hubs, 3 barns, 1 side gate quarter, 1 front gate, 70 separate sheds, 2 suragan temporary buildings, oesammun gate and hongsalmun gate were found. Such architectural layout is matched with the Temporary Palace Jugyohwaneodo Painting.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.525-528
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• 2004

Manchester encoder of FSM method is a suitable signal coding for an RFID system. However, Manchester encoder of FSM method has usually more gate count and lower maximum frequency than encoder of exclusive-OR gate method. In this paper. it is proposed encoder of FSM method to improve gate count and maximum frequency.

• 대한토목학회논문집
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• 제32권6A호
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• pp.337-345
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• 2012

본 연구에서는 4대강 사업으로 건설중인 트러스형 리프트의 진동특성을 검토하기 위하여 모형실험이 수행된다. 경간 40 m, 높이 9 m의 트러스형 리프트게이트를 축척 1/25로 모형이론에 따라 아크릴과 납으로 모형을 제작하고, 폭 1.6 m, 길이 25 m, 높이 0.8 m의 수로에서 실험된다. 먼저 모형의 고유진동수가 측정되고 모형을 검증하기 위하여 유한요소 해석결과와 비교된다. 검증된 모형에서 상하류 수위와 문비 개방고에 따른 진동가속도 진폭이 측정된다. 또한 문비의 진동을 줄 일수 있는 하부형상을 검토하기 위하여 문비 최하부의 각도가 $20^{\circ}$, $35^{\circ}$, $50^{\circ}$인 모형을 제작하고 실험결과를 서로 비교한다. 실험 결과는 수문 조작 시 유지관리지침의 기본 자료를 제공하고, 수문의 진동특성과 진동을 줄일 수 있는 수문의 하부형상을 검토한다.

• 센서학회지
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• 제30권2호
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• pp.114-118
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• 2021

In this study, the sensitivity of an active pixel sensor (APS) was adjusted by employing a gate/body-tied (GBT) p-channel metal-oxide semiconductor field-effect transistor (PMOSFET)-type photodetector with a transfer gate. A GBT PMOSFET-type photodetector can amplify the photocurrent generated by light. Consequently, APSs that incorporate GBT PMOSFET-type photodetectors are more sensitive than those APSs that are based on p-n junctions. In this study, a transfer gate was added to the conventional GBT PMOSFET-type photodetector. Such a photodetector can adjust the sensitivity of the APS by controlling the amount of charge transmitted from the drain to the floating diffusion node according to the voltage of the transfer gate. The results obtained from conducted simulations and measurements corroborate that, the sensitivity of an APS, which incorporates a GBT PMOSFET-type photodetector with a built-in transfer gate, can be adjusted according to the voltage of the transfer gate. Furthermore, the chip was fabricated by employing the standard 0.35 ㎛ complementary metal-oxide semiconductor (CMOS) technology, and the variable sensitivity of the APS was thereby experimentally verified.