• Title/Summary/Keyword: Fully differential amplifier

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New Fully-Differential CMOS Second-Generation Current Conveyer

  • Mahmoud, Soliman A.
    • ETRI Journal
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    • v.28 no.4
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    • pp.495-501
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    • 2006
  • This paper presents a new CMOS fully-differential second-generation current conveyor (FDCCII). The proposed FDCCII is based on a fully-differential difference transconductor as an input stage and two class AB output stages. Besides the proposed FDCCII circuit operating at a supply voltage of ${\pm}1.5\;V$, it has a total standby current of $380\;{\mu}A$. The applications of the FDCCII to realize a variable gain amplifier, fully-differential integrator, and fully-differential second-order bandpass filter are given. The proposed FDCII and its applications are simulated using CMOS $0.35\;{\mu}m$ technology.

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A fully-differential bipolar current-controlled current amplifier(CCCA) (완전-차동형 바이폴라 전류-제어 전류 증폭기(CCCA))

  • 손창훈;임동빈;차형우
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.289-292
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    • 2001
  • A Novel fully-differential bipolar current-controlled current amplifier(CCCA) for electrically tunable circuit design at current-mode signal processing were designed. The CCCA was consisted of fully-differential subtracter and fully-differential current gain amplifier. The simulation result shows that the CCCA has current input impedance of 0.5 Ω and a good linearity. The CCCA has 3-dB cutoff frequency of 20 MHz for the range over bias current 100$mutextrm{A}$ to 20 ㎃. The power dissipation is 3 mW.

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The design of Fully Differential CMOS Operational Amplifier (Fully Differential CMOS 연산 증폭기 설계)

  • Ahn, In-Soo;Song, Seok-Ho;Choi, Tae-Sup;Yim, Tae-Soo;Sakong, Sug-Chin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.6
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    • pp.85-96
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    • 2000
  • It is necessary that fully differential operational amplifier circuit should drive an external load in the VLSI design such as SCF(Switched Capacitor Filter), D/A Converter, A/D Converter, Telecommunication Circuit and etc. The conventional CMOS operational amplifier circuit has many problems according to CMOS technique. Firstly, Capacity of large loads are not able to operate well. The problem can be solve to use class AB stages. But large loads are operate a difficult, because an element of existing CMOS has a quadratic functional relation with input and output voltage versus output current. Secondly, Whole circuit of dynamic range decrease, because a range of input and output voltages go down according as increasing of intergration rate drop supply voltage. The problem can be improved by employing fully differential operational amplifier using differential output stage with wide output swing. In this paper, we proposed new current mirror has large output impedance and good current matching with input an output current and compared with characteristics for operational amplifier using cascoded current mirror. To obtain large output swing and low power consumption we suggest a fully differential operational amplifier. The circuit employs an output stage composed new current mirror and two amplifier stage. The proposed circuit is layout and circuit of capability is inspected through simulation program(SPICE3f).

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A low-Gain Error Amplifier for Common-Mode Feedback Circuit (Common Mode Feedback 회로를 위한 저 증폭도 에러증폭기)

  • 정근정;노정진
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.9
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    • pp.714-723
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    • 2003
  • An effective technique to increase the signal swing and reduce noise is to use fully-differential -circuits. However, design of a common-mode feedback (CMFB) circuit that stabilizes the common-mode output level is essential. In this paper, a general description is given to fully-differential amplifiers with their CMFB loops, then a new error amplifier that is just composed of transistors and stabilizes the DC output level is proposed. We designed a simple and efficient bias circuit that allows the stability and maximum input swing. Simulation result shows the enhanced phase margin and increased differential-mode input swing with a proposed error amplifier.

Integrated Rail-to-Rail Low-Voltage Low-Power Enhanced DC-Gain Fully Differential Operational Transconductance Amplifier

  • Ferri, Giuseppe;Stornelli, Vincenzo;Celeste, Angelo
    • ETRI Journal
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    • v.29 no.6
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    • pp.785-793
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    • 2007
  • In this paper, we present an integrated rail-to-rail fully differential operational transconductance amplifier (OTA) working at low-supply voltages (1.5 V) with reduced power consumption and showing high DC gain. An embedded adaptive biasing circuit makes it possible to obtain low stand-by power dissipation (lower than 0.17 mW in the rail-to-rail version), while the high DC gain (over 78 dB) is ensured by positive feedback. The circuit, fabricated in a standard CMOS integrated technology (AMS 0.35 ${\mu}m$), presents a 37 V/${\mu}s$ slew-rate for a capacitive load of 15 pF. Experimental results and high values of two quality factors, or figures of merit, show the validity of the proposed OTA, when compared with other OTA configurations.

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A Design of Novel Instrumentation Amplifier Using a Fully-Differential Linear OTA (완전-차동 선형 OTA를 사용한 새로운 계측 증폭기 설계)

  • Cha, Hyeong-Woo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.1
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    • pp.59-67
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    • 2016
  • A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

A CMOS Op-amp Design of Improved Common Mode Feedback(CMFB) Circuit for High-frequency Filter Implementation (고주파용 필터구현을 위한 개선된 CMFB회로를 이용한 CMOS Op-amp 설계)

  • Lim, Dae-Sung;Choi, Young-Jae;Lee, Meung-Su;Kim, Dong-Yong
    • Proceedings of the KIEE Conference
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    • 1993.07a
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    • pp.479-482
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    • 1993
  • A fully balanced differential amplifier can achieve high-gain wide-bandwidth characteristics. And also, Offset PSRR, CMRR and Noise performance of that are excellent, but these merits can be achieved only when the architecture holds fully balanced. Commonly, the fully balanced differential amplifier has a common mode feedback(CMFB) circuit in order to maintain the balance. This paper presents improved characteristics of the CMFB circuit and designs the wide-bandwidth CMOS Op-amp. The unity gain bandwidth of this Op-amp is 50MHz with the load capacitor 2pF, and the value of phase margin is $85^{\circ}$.

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1.5Gb/s Low Power LVDS I/O with Sense Amplifier (Sense amplifier를 이용한 1.5Gb/s 저전력 LVDS I/O 설계)

  • 변영용;이승학;김성하;김동규;김삼동;황인석
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.979-982
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    • 2003
  • Due to the differential transmission technique and low voltage swing, LVDS has been widely used for high speed transmission with low power consumption. This paper presents the design and implementation of interface circuits for 1.5Gb/s operation in 0.35um CMOS technology. The interface circuit ate fully compatible with the low-voltage differential signaling(LVDS) standard. The LVDS proposed in this paper utilizes a sense amplifiers instead of the conventional differential pre-amplifier, which provides a 1.5Gb/s transmission speed with further reduced driver output voltage. Furthermore, the reduced driver output voltage results in reducing the power consumption.

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An Accurate Fully Differential Sample-and-Hold Circuit (정밀한 완전 차동 Sample-and-Hold 회로)

  • 기중식;정덕균;김원찬
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.3
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    • pp.53-59
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    • 1994
  • A new fully differential sample-and-hold circuit which can effectively compensate the offset voltage of an operational amplifier and the charge injection of a MOS switch is presented. The proposed circuit shows a true sample-and-hold function without a reset period or an input-track period. The prototype fabricated using a 1.2$\mu$m double-polysilicon CMOS process occupies an area of 550$\mu$m$\times$288$\mu$m and the error of the sampled ouput is 0.056% on average for 3V input at DC.

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An MMIC Broadband Image Rejection Downconverter Using an InGaP/GaAs HBT Process for X-band Application

  • Lee Jei-Young;Lee Young-Ho;Kennedy Gary P.;Kim Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.6 no.1
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    • pp.18-23
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    • 2006
  • In this paper, we demonstrate a fully integrated X-band image rejection down converter, which was developed using InGaP/GaAs HBT MMIC technology, consists of two single-balanced mixers, a differential buffer amplifier, a differential YCO, an LO quadratue generator, a three-stage polyphase filter, and a differential intermediate frequency(IF) amplifier. The X-band image rejection downconverter yields an image rejection ratio of over 25 dB, a conversion gain of over 2.5 dB, and an output-referred 1-dB compression power$(P_{1dB,OUT})$ of - 10 dBm. This downconverter achieves broadband image rejection characteristics over a frequency range of 1.1 GHz with a current consumption of 60 mA from a 3-V supply.