• Nuclear Engineering and Technology
• /
• v.55 no.1
• /
• pp.109-118
• /
• 2023

In this paper, the evaluation method of fluidelastic instability (FEI) of newly designed steam generator tubing in pressurized water reactor (PWR) nuclear power plants is discussed. To obtain the parameters for prediction of the critical velocity of FEI for steam generator tubes, experimental research is carried out, and the design parameters are determined. Using CFD numerical simulation, the tube array scale of the model experiment is determined, and the experimental device is designed. In this paper, 7 groups of experiments with void fractions of 0% (water), 10%, 20%, 50%, 75%, 85% and 95% were carried out. The critical damping ration, fundamental frequency and critical velocity of FEI of tubes in flowing water were measured. Through calculation, the total mass and instability constant of the immersed tube are obtained. The critical damping ration measured in the experiment mainly included two-phase damping and viscous damping, which changed with the change in void fraction from 1.56% to 4.34%. This value can be used in the steam generator design described in this paper and is conservative. By introducing the multiplier of frequency and square root of total mass per unit length, it is found that the difference between the experimental results and the calculated results is less than 1%, which proves the rationality and feasibility of the calculation method of frequency and total mass per unit length in engineering design. Through calculation, the instability constant is greater than 4 when the void fraction is less than 75%, less than 4 when the void fraction exceeds 75% and only 3.04 when the void fraction is 95%.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.43 no.4 s.346
• /
• pp.75-80
• /
• 2006

This paper has proposed a novel dual band transmitter module which can be operating either as an amplifier or as a frequency multiplier according to the input frequency. A conventional dual band transmitter consists of separate amplifiers operating at each frequency band, but the proposed dual band module operates as an amplifier for the IEEE 802.11b/g signal, and as a frequency doubler for the IEEE 802.11a signal according to input frequency and bias voltage. In this paper, we have obtained sharp stop band characteristics by using microstrip DGS(Defected Ground Structure) to suppress the fundamental frequency of the frequency doubler as well as the second harmonic of the amplifier. From measurement result, second harmonic suppression is below -59dBc in the amplifier mode, and fundamental suppression is below -35dBc in the frequency doubler mode. And the designed module has 17.8dBm output P1dB at 2.4GHz and 10.1dBm power for 5.8GHz output, and the output power in the two modes are 0.8dB and 2.8dB larger than the module with ${\lambda}g/4$ reflector, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.12C
• /
• pp.1167-1176
• /
• 2009

In This Paper, we introduce an efficient IFFT design technique named for transmitter of OFDM (Orthogonal Frequency Division Multiplexing) system. In OFDM system, a cyclic prefix is inserted in forepart of OFDM symbol to prevent ICI(Inter-channel Interference) and ISI (Inter-symbol Interference). Attaching cyclic prefix causes delay in storing and copying IFFT result. The proposed IFFT removes this delay because its output is cyclic shifted by the length of cyclic prefix. So we can make a complete OFDM symbol by just copying the forepart of IFFT output to the end. In many cases, the length of cyclic prefix is 1/2n of FFT size, and this IFFT does not require additional hardware complexity and it does not cause any performance degradation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.12C
• /
• pp.233-239
• /
• 2001

Among the operations in frequency domain for ADSL G.LITE Modem to perform, FFT and FEQ are most computation-intensive part, of which many researches have been focused on the efficient implementation. Previous papers suggested hardwares suitable for ADSL G.DMT system, which is not feasible for simple G.LITE system. The analysis of frequency domain operations and computational efficiency according to the allocation of hardware resources is performed in this paper. The suggested processor has the structure of one real multiplier and two real adders connected in parallel, which can perform the operations efficiently through the pipeline- and/or parallel-type job scheduling. The suggested processor uses less hardware resources than Kiss\`s ALU structure or FFT/IFFT processor suggested by Wang, so the suggested one is more suitable for G.LITE system than previous works.

• ETRI Journal
• /
• v.30 no.6
• /
• pp.826-832
• /
• 2008

The metal-ferroelectric-metal (MFM) capacitor in the ferroelectric random access memory (FeRAM) embedded RFID chip is used in both the memory cell region and the peripheral analog and digital circuit area for capacitance parameter control. The capacitance value of the MFM capacitor is about 30 times larger than that of conventional capacitors, such as the poly-insulator-poly (PIP) capacitor and the metal-insulator-metal (MIM) capacitor. An MFM capacitor directly stacked over the analog and memory circuit region can share the layout area with the circuit region; thus, the chip size can be reduced by about 60%. The energy transformation efficiency using the MFM scheme is higher than that of the PIP scheme in RFID chips. The radio frequency operational signal properties using circuits with MFM capacitors are almost the same as or better than with PIP, MIM, and MOS capacitors. For the default value specification requirement, the default set cell is designed with an additional dummy cell.

• Transactions of the Korean Society of Machine Tool Engineers
• /
• v.12 no.2
• /
• pp.71-78
• /
• 2003

This research proposes an implementation method of linearized equations of motion for multibody systems with closed loops. The null space of the constraint Jacobian is first pre-multiplied to the equations of motion to eliminate the Lagrange multiplier and the equations of motion are reduced down to a minimum set of ordinary differential equations. The resulting differential equations are functions of all relative coordinates, velocities, and accelerations. Since the variables are tightly coupled by the position, velocity, and acceleration level coordinates, direct substitution of the relationships among these variables yields very complicated equations to be implemented. As a consequence, the reduced equations of motion are perturbed with respect to the variations of all variables, which are coupled by the constraints. The position velocity and acceleration level constraints are also perturbed to obtain the relationships between the variations of all relative coordinates, velocities, and accelerations and variations of the independent ones. The Perturbed constraint equations are then simultaneously solved for variations of all variables only in terms of the variations of the independent variables. Finally, the relationships between the variations of all variables and these of the independent ones are substituted into the variational equations of motion to obtain the linearized equations of motion only in terms of the independent variables variations.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.32 no.3C
• /
• pp.306-313
• /
• 2007

In this paper, we efficiently implemented turbo code algorithm in FPGA H/W(hardware) resource. The used turbo code algorithm has the characteristics; the size of constraint is 3, encoder type is 1/3, the size of random interleaver is 2048. The proposed H/W consists of MAP block for calculating alpha and delta using delta value, storing buffer for each value, multiplier for calculating lamda, and lamda buffer. The proposed algorithm and H/W architecture was verified by C++ language and was designed by VHDL. Finally the designed H/W was programmed into FPGA and tested in wireless communication environment for field availability. The target FPGA of the implemented H/W is VERTEX4 XC4VFX12-12-SF363 and it is stably operated in 131.533MHz clock frequency (7.603ns).

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.27 no.8
• /
• pp.1303-1308
• /
• 2003

This research proposes an implementation method of linearized equations of motion for multibody systems with closed loops. The null space of the constraint Jacobian is first pre-multiplied to the equations of motion to eliminate the Lagrange multiplier and the equations of motion are reduced down to a minimum set of ordinary differential equations. The resulting differential equations are functions of ail relative coordinates, velocities, and accelerations. Since the coordinates, velocities, and accelerations are tightly coupled by the position, velocity, and acceleration level constraints, direct substitution of the relationships among these variables yields very complicated equations to be implemented. As a consequence, the reduced equations of motion are perturbed with respect to the variations of all coordinates, velocities, and accelerations, which are coupled by the constraints. The position, velocity and acceleration level constraints are also perturbed to obtain the relationships between the variations of all relative coordinates, velocities, and accelerations and variations of the independent ones. The perturbed constraint equations are then simultaneously solved for variations of all coordinates, velocities, and accelerations only in terms of the variations of the independent coordinates, velocities, and accelerations. Finally, the relationships between the variations of all coordinates, velocities, accelerations and these of the independent ones are substituted into the variational equations of motion to obtain the linearized equations of motion only in terms of the independent coordinate, velocity, and acceleration variations.

• Transactions of the Korean Society of Automotive Engineers
• /
• v.1 no.3
• /
• pp.74-82
• /
• 1993

Optimal designs of a 3-point and a 4-point engine mount system are presented for reducing the idle shake of a Front Wheel Drive(FWD) vehicle. Design variables used in this study are the locations, the angles and the stiffness of an engine mount system. The goal of the optimization is minimizing the transmitted force without violating the constraints such as static weight sag, resonant frequency and side limits of design variables. The Augmented Lagrange Multiplier(ALM) Method is used for solving the nonlinear constrained optimization. The generalized Jacobi and the impedence method are employed for a free vibration analysis and a forced response analysis. The trend of analysis results well meet that of the experimental results. The optimization results reveal that the 4-point system transmits less torque than the 3-point system. It is also found from the design sensitivity analysis that the vibration characteristics of the 4-point system is less sensitive than those of the 3-point system.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2002.05a
• /
• pp.651-659
• /
• 2002

Component Mode Synthesis (CMS) is a dynamic substructuring technique to get an approximate eigensolutions of large degree-of-freedom structures divisible into several components. But, In practice. most of large structures are modeled by different teams of engineers. and their respective finite element models often require different mesh resolutions. As a result, the finite element substructure models can be non-conforming and/or incompatible. In this work, A hybrid version of component mode synthesis using a localized lagrange multiplier to treat the non-conforming mesh problem was derived. Evolution Strategies (ESs) is a stochastic numerical optimization technique and has shown a robust performance for solving deterministic problems. An ESs conducts its search by processing a population of solutions for an optimization problem based on principles from natural evolution. An optimization example for raising the first natural frequency of a plate structure using beam stiffeners was presented using hybrid component mode synthesis and robust evolution strategies (RES) optimization technique. In the example. the design variables are the positions and lengths of beam stiffeners.