• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.586-589
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• 1999

Organic semiconductors based on conjugated thiophene oligomer have great potential to be utilized as an active layer far electronic and optoelectronic devices. In this study, $\alpha$ -sexithiophene($\alpha$-6T) thin films and various electrode materials were deposited by Organic Molecular Beam Deposition(OMBD) and vacuum evaporation respectively. Those films were photolithographically patterned fur measurements. Electrical characterization of the thin film transistor with various channel length were measured, and field effect mobility is calculated by formula.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.6
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• pp.558-562
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• 2006

We have synthesized a new p-type polymer, poly(9,9'-n-dioctylfluorene-alt-phenoxazine) (PFPO), via the palladium catalyzed coupling reaction. The number average molecular weight ($M_n$) of PFPO was found to be 23,000. PFPO dissolves in common organic solvents such as chloroform and toluene. The UV-visible absorption maximum of the PFPO thin film is clearly blue-shifted with respect to that of F8T2, poly-(9,9'-n-dioctylfluorene-alt-bithiophene). The introduction of the phenoxazine moiety into the polymer system results in better field-effect transistor (FET) performance than that of F8T2. A solution processed PFPO TFT device with a top contact geometry was found to exhibit a hole mobility of $2.7{\times}10^{-4}cm^2/Vs$ and a low threshold voltage of -2 V with high on/off ratio(${\sim}10^4$).

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.1
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• pp.26-29
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• 2006

Transparent ZnO thin films were prepared by KrF pulsed laser deposition (PLD) technique and applied to a bottom-gate type thin film transistor device as an active channel layer. A high conductive crystalline Si substrate was used as an metal-like bottom gate and SiN insulating layer was then deposited by LPCVD(low pressure chemical vapour deposition). An aluminum layer was then vacuum evaporated and patterned to form a source/drain metal contact. Oxygen partial pressure and substrate temperature were varied during the ZnO PLD deposition process and their influence on the thin film properties were investigated by X-ray diffraction(XRD) and Hall-van der Pauw method. Optical transparency of the ZnO thin film was analyzed by UV-visible phometer. The resulting ZnO-TFT devices showed an on-off ration of $10^6$ and field effect mobility of 2.4-6.1 $cm^2/V{\cdot}s$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.8
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• pp.491-495
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• 2017

We investigated solution-processed indium-zinc oxide (IZO) thin-film transistors (TFTs) by inserting a 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (PBD) buffer layer. This buffer layer efficiently tuned the energy level between the semiconducting oxide channel and metal electrode by increasing charge extraction, thereby enhancing the overall device performance: the IZO TFT with embedded PBD layer (thickness: 5 nm; width: $2,000{\mu}m$; length: $200{\mu}m$) exhibited a field-effect mobility of $1.31cm^2V^{-1}s^{-1}$, threshold voltage of 0.12 V, subthreshold swing of $0.87V\;decade^{-1}$, and on/off current ratio of $9.28{\times}10^5$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.320-323
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• 2000

In the resent years, the Thin Film Transistor Liquid Crystal Display(TFT-LCD) have trend toward larger panel sizes and higher spatial and/or gray-scale resolution. In this trend, Because of its low field effect mobility, a-Si TFT is change to poly-Si TFT. In this paper, both effective-medium model of poly-Si TFTs and empirical capacitance model are applied to Pixel Design Array Simulation Tool (PDAST) and the pixel characteristics of TFT-LCD array were simulated, which were compared with the results calculated by Aim-Spice.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.04a
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• pp.62-63
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• 2006

In this paper, the characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated on polymer substrates are investigated. The a-Si films was laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated nMOS TFT showed field-effect mobility of $30cm2/V{\cdot}s$, on/off ratio of 105 and threshold voltage of 5 V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.9
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• pp.527-531
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• 2016

In this study, p-type thin film transistors consisting of CuO channels were fabricated by sol-gel process, with copper (II) acetate monohydrate precursors. At $500^{\circ}C$, the deposited films were fully converted into monoclinic phase CuO. The fabricated CuO thin film transistors deliver field effect mobility in saturation regime of $0.015cm^2/Vs$, and $I_{on}/I_{off}$ of ${\sim}10^3$. The degradation of the performance of the fabricated CuO thin film transistor caused by the exposure to air has been studied.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.05a
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• pp.220-220
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• 2012

저밀도 알곤 유도결합플라즈마(Ar-ICP) 를 적용한 그래핀 클리닝 연구를 보고한다. 알곤 축전결합플라즈마(Ar-CCP)는 높은 이온포격에너지 (수백 eV) 로 인하여 그래핀의 C-C $sp_2$ bonding을 쉽게 파괴하고 defect을 형성시킨다. 그러나 저밀도 ($n_i$ < $5{\times}10^8cm^{-3}$) Ar-ICP 에 노출된 그래핀은 낮은 이온포격에너지, 이온밀도로 인하여 defect 이 형성되지 않고 residue 제거가 가능하였다. Graphene 이 집적된 back-gated field effect transistor (G-FET) 가 저밀도 Ar-ICP 에 노출될 경우 resist residue 제거로 인하여 $V_{dirac}$ 이 0 V 방향으로 이동하고 mobility 가 증가하는 것을 확인하였다.

• Proceedings of the Korean Magnestics Society Conference
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• 2008.12a
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• pp.26.2-26.2
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• 2008

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.4
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• pp.272-275
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• 2019

We investigated the electrical characteristics of amorphous silicon-zinc-tin-oxide (a-SZTO) thin films deposited by RF-magnetron sputtering at room temperature depending on the deposition time. We fabricated a thin film transistor (TFT) with a bottom gate structure and various channel thicknesses. With increasing channel thickness, the threshold voltage shifted negatively from -0.44 V to -2.18 V, the on current ($I_{on}$) and field effect mobility (${\mu}_{FE}$) increased because of increasing carrier concentration. The a-SZTO film was fabricated and analyzed in terms of the contact resistance and channel resistance. In this study, the transmission line method (TLM) was adopted and investigated. With increasing channel thickness, the contact resistance and sheet resistance both decreased.