Fig. 1. The bottom gate schematic structure of the (a) TFT and (b) TLM.
Fig. 2. The transfer curve of a-SZTO TFT as a function of channel thickness.
Fig. 3. The total resistances as a function of the channel length with various Vg were measured using the transmission line method (TLM) depending on the deposition time, (a) 3 min, (b) 5 min, and (c) 7 min.
Fig. 4. The (a) Rc and (b) Rsh depending on the deposition time.
Table 1. The electronic characteristics of a-SZTO depending on the deposition time.
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