• 제어로봇시스템학회:학술대회논문집
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• 1991.10a
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• pp.939-944
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• 1991

The dynamic behavior of a quick-acting hydraulic fuse is investigated by analysis and experiment. In view of the short response time, a proper dynamic analysis of the entire hydraulic circuit is necessary, in addition to analysis of the fuse behavior. Dynamic models of the fuse and other hydraulic circuit elements used in the experimental setup are derived and used for computer simulation. Also, the experiments are performed under a variety of operating conditions. Experimental and analytical results are in very good agreement.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2359-2368
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• 2013

In this paper, an IRD (internal read data) circuit preventing the reentry into the read mode while keeping the read-out DOUT datum at power-up even if noise such as glitches occurs at signal ports such as an input signal port RD (read) when a power IC is on, is proposed. Also, a pulsed WL (word line) driving method is used to prevent a DC current of several tens of micro amperes from flowing into the read transistor of a differential paired eFuse OTP cell. Thus, reliability is secured by preventing non-blown eFuse links from being blown by the EM (electro-migration). Furthermore, a compared output between a programmed datum and a read-out datum is outputted to the PFb (pass fail bar) pin while performing a sensing margin test with a variable pull-up load in consideration of resistance variation of a programmed eFuse in the program-verify-read mode. The layout size of the 8-bit eFuse OTP IP with a $0.18{\mu}m$ process is $189.625{\mu}m{\times}138.850{\mu}m(=0.0263mm^2)$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.2
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• pp.306-316
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• 2016

In this paper, an NMOS-diode eFuse OTP (One-Time Programmable) memory cell is proposed using a parasitic junction diode formed between a PW (P-Well), a body of an isolated NMOS (N-channel MOSFET) transistor with the small channel width, and an n+ diffusion, a source node, in a DNW (Deep N-Well) instead of an NMOS transistor with the big channel width as a program select device. Blowing of the proposed cell is done through the parasitic junction formed in the NMOS transistor in the program mode. Sensing failures of '0' data are removed because of removed contact voltage drop of a diode since a NMOS transistor is used instead of the junction diode in the read mode. In addition, a problem of being blown for a non-blown eFuse from a read current through the corresponding eFuse OTP cell is solved by limiting the read current to less than $100{\mu}A$ since a voltage is transferred to BL by using an NMOS transistor with the small channel width in the read mode.

• Journal of IKEEE
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• v.26 no.3
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• pp.422-429
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• 2022

A light sensor chip requires a small capacity eFuse (electrical fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) to trim analog circuits or set initial values of digital registers. In this paper, 128-bit eFuse OTP IP is designed using only 3.3V MV (Medium Voltage) devices without using 1.8V LV (Low-Voltage) logic devices. The eFuse OTP IP designed with 3.3V single MOS devices can reduce a total process cost of three masks which are the gate oxide mask of a 1.8V LV device and the LDD implant masks of NMOS and PMOS. And since the 1.8V voltage regulator circuit is not required, the size of the illuminance sensor chip can be reduced. In addition, in order to reduce the number of package pins of the illumination sensor chip, the VPGM voltage, which is a program voltage, is applied through the VPGM pad during wafer test, and the VDD voltage is applied through the PMOS power switching circuit after packaging, so that the number of package pins can be reduced.

• Journal of Periodontal and Implant Science
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• v.39 no.3
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• pp.349-358
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• 2009

Purpose: This study was aimed to evaluate the effect of the Freeze Dried Bone Allograft and Demineralized Bone Matrix on osseous regeneration in the rat calvarial defects. Methods: Eight mm critical-sized calvarial defects were created in the 80 male Sprague-Dawley rats. The animals were divided into 4 groups of 20 animals each. The defects were treated with Freeze Dried Bone Allograft($SureOss^{TM}$), Demineralized Bone Matrix($ExFuse^{TM}$ Gel, $ExFuse^{TM}$ Putty), or were left untreated for sham-surgery control and were evaluated by histologic and histomorphometric parameters following a 2 and 8 week healing intervals. Statistical analysis was done between each groups and time intervals with ANOVA and paired t-test. Results: Defect closure, New bone area, Augmented area in the $SureOss^{TM}$, $ExFuse^{TM}$ Gel, $ExFuse^{TM}$ Putty groups were significantly greater than in the sham-surgery control group at each healing interval(P < 0.05). In the New bone area and Defect closure, there were no significant difference between experimental groups. Augmented area in the $ExFuse^{TM}$ Gel, $ExFuse^{TM}$ Putty groups were significantly greater than $SureOss^{TM}$ group at 2weeks(P < 0.05), however there was no significant difference at 8 weeks. Conclusions: All of $SureOss^{TM}$, $ExFuse^{TM}$ Gel, $ExFuse^{TM}$ Putty groups showed significant new bone formation and augmentation in the calvarial defect model.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.10
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• pp.623-629
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• 2014

For the semiconductor device safety from over current in the digital electronic circuit system must be surely designed that it's surface mount type micro fuse device. In this paper, We has analysed to the fusing character of micro fuse as a function changed thickness of thermosetting ink epoxy. To the change of thermosetting ink epoxy thickness with in production lot, in the electrically character (fusing test in the 2 multiple over current and 10 multiple over current, surface temperature test in the 1.25 multiple over current) of micro fuse has been tested. According to the electrically character result, changed thickness of thermosetting ink epoxy in designed micro fuse withheld direct effect in both end resistance changes. Also, because high thermal energy in the micro fuse test of over current was occurred to effect such as thermal runaway and explosion. Therefore, screen printing process in the design of micro fuse using thermosetting ink epoxy is very important for production quality improvement.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.1259-1260
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• 2013

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1525-1527
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• 1998

The line-fuse which one of device most widely used in distributed line system has a ability to cut off the fault current flow into the house. But this device can be used only one time. So there are many waste of human power and money to exchange acted line-fuse. In this paper, we designed new type of line-fuse melting zone using by different union metal, so line-fuse can be reused after once operated.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1205-1209
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• 1997

When the short fault current is flowed into a fuse, the notch of element is melted, and burnbacked by arc plasma, which caused by the voltage of fuse at both ends. The cutoff ability of fuse is heavily influenced by the degree of burnback. In this paper, we investigated the amount of burnback to the applied voltage di/dt variation, As a result, we confirmed that the amount of burnback is proportional to the variation of the applied voltage.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1382-1384
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• 1994

Description is given of the effect of fuse-element notch shape on interruption parameters. The notch of fuse-elements have all the same area. Tests were carried out at direct current and carried out the effect of the fuse element construction on the process of interrupting short circuit and overload current. The arcing phenomenon in a low voltage fuse operation in case of high current value of short circuit is analyzed.